Hello All
I am still a newbie to building using linix makefile cross compiling.
I have years of experience with Microchip but want to grow my knowledge in linux.
I have selected the SAMA5D27 that is part of the ATSAMA5D27-WLSOM1-EK1 development board that has a Cortex-A5.
But I also want to implement FreeRTOS as later I want to try SafeRTOS.
I did look under the examples but even using eclipse I get the same error.
Below is my simple makefile for a starter:
#################################
# GNU ARM Embedded Toolchain
#################################
#COMP = arm-linux-gnueabi-gcc
COMP=arm-linux-gnueabi-gcc
#COMP=arm-elf-gcc
MPU_TARGET = -mcpu=cortex-a5 -march=armv7-a -Wall -fdata-sections -ffunction-sections
#MPU_TARGET = -mcpu=cortex-a5 -march=armv7-a -mfloat-abi=hard -mfpu=neon-fp-armv8 -mneon-for-64bits
#MPU_TARGET = -mcpu=sama5d27-som1-ek sama5d2-ptc-ek
#################################
# Include directories begin
#################################
#################################
# + Root directory
#################################
INCLUDE_DIR = -I./
#################################
# + FreeRTOS directory
#################################
INCLUDE_DIR += -I./include
INCLUDE_DIR += -I./portable/GCC/ARM_CA53_64_BIT
#################################
# Include directories end
#################################
SRC_DIR = $(wildcard *.c)
OBJECT_DIR = ./obj
OBJ = $(patsubst %.c,%.o,$(wildcard *.c))
GCC :
$(COMP) $(MPU_TARGET) $(SRC_DIR) $(INCLUDE_DIR)
But I keep on getting tmp/cc8qyeDo.s:1907: Error: selected processor does not support requested special purpose register – `msr DAIFSET,#2’.
arm-none-eabi-gcc -mcpu=cortex-a5 -march=armv7-a -Wall -fdata-sections -ffunction-sections stream_buffer.c queue.c croutine.c list.c event_groups.c tasks.c timers.c -I./ -I./include -I./portable/GCC/ARM_CA53_64_BIT
cc1: warning: switch '-mcpu=cortex-a5' conflicts with '-march=armv7-a' switch
In file included from ./include/portable.h:53,
from ./include/FreeRTOS.h:65,
from stream_buffer.c:39:
./portable/GCC/ARM_CA53_64_BIT/portmacro.h:71: warning: "portBYTE_ALIGNMENT" redefined
71 | #define portBYTE_ALIGNMENT 16
|
In file included from ./include/FreeRTOS.h:59,
from stream_buffer.c:39:
./FreeRTOSConfig.h:43: note: this is the location of the previous definition
43 | #define portBYTE_ALIGNMENT 32
|
In file included from ./include/portable.h:53,
from ./include/FreeRTOS.h:65,
from stream_buffer.c:39:
./portable/GCC/ARM_CA53_64_BIT/portmacro.h:105: warning: "portDISABLE_INTERRUPTS" redefined
105 | #define portDISABLE_INTERRUPTS() \
|
In file included from ./include/FreeRTOS.h:59,
from stream_buffer.c:39:
./FreeRTOSConfig.h:42: note: this is the location of the previous definition
42 | #define portDISABLE_INTERRUPTS
|
cc1: warning: switch '-mcpu=cortex-a5' conflicts with '-march=armv7-a' switch
In file included from ./include/portable.h:53,
from ./include/FreeRTOS.h:65,
from queue.c:37:
./portable/GCC/ARM_CA53_64_BIT/portmacro.h:71: warning: "portBYTE_ALIGNMENT" redefined
71 | #define portBYTE_ALIGNMENT 16
|
In file included from ./include/FreeRTOS.h:59,
from queue.c:37:
./FreeRTOSConfig.h:43: note: this is the location of the previous definition
43 | #define portBYTE_ALIGNMENT 32
|
In file included from ./include/portable.h:53,
from ./include/FreeRTOS.h:65,
from queue.c:37:
./portable/GCC/ARM_CA53_64_BIT/portmacro.h:105: warning: "portDISABLE_INTERRUPTS" redefined
105 | #define portDISABLE_INTERRUPTS() \
|
In file included from ./include/FreeRTOS.h:59,
from queue.c:37:
./FreeRTOSConfig.h:42: note: this is the location of the previous definition
42 | #define portDISABLE_INTERRUPTS
|
/tmp/ccEeh6AD.s: Assembler messages:
/tmp/ccEeh6AD.s:124: Error: selected processor does not support `smc 0' in ARM mode
/tmp/ccEeh6AD.s:662: Error: selected processor does not support `smc 0' in ARM mode
/tmp/ccEeh6AD.s:673: Error: selected processor does not support `smc 0' in ARM mode
/tmp/ccEeh6AD.s:746: Error: selected processor does not support `smc 0' in ARM mode
/tmp/ccEeh6AD.s:1150: Error: selected processor does not support `smc 0' in ARM mode
/tmp/ccEeh6AD.s:1223: Error: selected processor does not support `smc 0' in ARM mode
/tmp/ccEeh6AD.s:1341: Error: selected processor does not support `smc 0' in ARM mode
/tmp/ccEeh6AD.s:1434: Error: selected processor does not support `smc 0' in ARM mode
/tmp/ccEeh6AD.s:1571: Error: selected processor does not support `smc 0' in ARM mode
/tmp/ccEeh6AD.s:1644: Error: selected processor does not support `smc 0' in ARM mode
cc1: warning: switch '-mcpu=cortex-a5' conflicts with '-march=armv7-a' switch
In file included from ./include/portable.h:53,
from ./include/FreeRTOS.h:65,
from croutine.c:29:
./portable/GCC/ARM_CA53_64_BIT/portmacro.h:71: warning: "portBYTE_ALIGNMENT" redefined
71 | #define portBYTE_ALIGNMENT 16
|
In file included from ./include/FreeRTOS.h:59,
from croutine.c:29:
./FreeRTOSConfig.h:43: note: this is the location of the previous definition
43 | #define portBYTE_ALIGNMENT 32
|
In file included from ./include/portable.h:53,
from ./include/FreeRTOS.h:65,
from croutine.c:29:
./portable/GCC/ARM_CA53_64_BIT/portmacro.h:105: warning: "portDISABLE_INTERRUPTS" redefined
105 | #define portDISABLE_INTERRUPTS() \
|
In file included from ./include/FreeRTOS.h:59,
from croutine.c:29:
./FreeRTOSConfig.h:42: note: this is the location of the previous definition
42 | #define portDISABLE_INTERRUPTS
|
cc1: warning: switch '-mcpu=cortex-a5' conflicts with '-march=armv7-a' switch
In file included from ./include/portable.h:53,
from ./include/FreeRTOS.h:65,
from list.c:37:
./portable/GCC/ARM_CA53_64_BIT/portmacro.h:71: warning: "portBYTE_ALIGNMENT" redefined
71 | #define portBYTE_ALIGNMENT 16
|
In file included from ./include/FreeRTOS.h:59,
from list.c:37:
./FreeRTOSConfig.h:43: note: this is the location of the previous definition
43 | #define portBYTE_ALIGNMENT 32
|
In file included from ./include/portable.h:53,
from ./include/FreeRTOS.h:65,
from list.c:37:
./portable/GCC/ARM_CA53_64_BIT/portmacro.h:105: warning: "portDISABLE_INTERRUPTS" redefined
105 | #define portDISABLE_INTERRUPTS() \
|
In file included from ./include/FreeRTOS.h:59,
from list.c:37:
./FreeRTOSConfig.h:42: note: this is the location of the previous definition
42 | #define portDISABLE_INTERRUPTS
|
cc1: warning: switch '-mcpu=cortex-a5' conflicts with '-march=armv7-a' switch
In file included from ./include/portable.h:53,
from ./include/FreeRTOS.h:65,
from event_groups.c:38:
./portable/GCC/ARM_CA53_64_BIT/portmacro.h:71: warning: "portBYTE_ALIGNMENT" redefined
71 | #define portBYTE_ALIGNMENT 16
|
In file included from ./include/FreeRTOS.h:59,
from event_groups.c:38:
./FreeRTOSConfig.h:43: note: this is the location of the previous definition
43 | #define portBYTE_ALIGNMENT 32
|
In file included from ./include/portable.h:53,
from ./include/FreeRTOS.h:65,
from event_groups.c:38:
./portable/GCC/ARM_CA53_64_BIT/portmacro.h:105: warning: "portDISABLE_INTERRUPTS" redefined
105 | #define portDISABLE_INTERRUPTS() \
|
In file included from ./include/FreeRTOS.h:59,
from event_groups.c:38:
./FreeRTOSConfig.h:42: note: this is the location of the previous definition
42 | #define portDISABLE_INTERRUPTS
|
/tmp/ccEeh6AD.s: Assembler messages:
/tmp/ccEeh6AD.s:194: Error: selected processor does not support `smc 0' in ARM mode
/tmp/ccEeh6AD.s:431: Error: selected processor does not support `smc 0' in ARM mode
cc1: warning: switch '-mcpu=cortex-a5' conflicts with '-march=armv7-a' switch
In file included from ./include/portable.h:53,
from ./include/FreeRTOS.h:65,
from tasks.c:39:
./portable/GCC/ARM_CA53_64_BIT/portmacro.h:71: warning: "portBYTE_ALIGNMENT" redefined
71 | #define portBYTE_ALIGNMENT 16
|
In file included from ./include/FreeRTOS.h:59,
from tasks.c:39:
./FreeRTOSConfig.h:43: note: this is the location of the previous definition
43 | #define portBYTE_ALIGNMENT 32
|
In file included from ./include/portable.h:53,
from ./include/FreeRTOS.h:65,
from tasks.c:39:
./portable/GCC/ARM_CA53_64_BIT/portmacro.h:105: warning: "portDISABLE_INTERRUPTS" redefined
105 | #define portDISABLE_INTERRUPTS() \
|
In file included from ./include/FreeRTOS.h:59,
from tasks.c:39:
./FreeRTOSConfig.h:42: note: this is the location of the previous definition
42 | #define portDISABLE_INTERRUPTS
|
tasks.c: In function 'prvInitialiseNewTask':
tasks.c:871:46: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
871 | pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception. Avoiding casts between pointers and integers is not practical. Size differences accounted for using portPOINTER_SIZE_TYPE type. Checked by assert(). */
| ^
tasks.c:871:24: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
871 | pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception. Avoiding casts between pointers and integers is not practical. Size differences accounted for using portPOINTER_SIZE_TYPE type. Checked by assert(). */
| ^
In file included from ./include/FreeRTOS.h:59,
from tasks.c:39:
tasks.c:874:27: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
874 | configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
| ^
./FreeRTOSConfig.h:157:34: note: in definition of macro 'configASSERT'
157 | #define configASSERT( x ) if( ( x ) == 0 ) vAssertCalled( __FILE__, __LINE__ );
| ^
/tmp/ccEeh6AD.s: Assembler messages:
/tmp/ccEeh6AD.s:550: Error: selected processor does not support `smc 0' in ARM mode
/tmp/ccEeh6AD.s:705: Error: selected processor does not support `smc 0' in ARM mode
/tmp/ccEeh6AD.s:827: Error: selected processor does not support `smc 0' in ARM mode
/tmp/ccEeh6AD.s:879: Error: selected processor does not support `smc 0' in ARM mode
/tmp/ccEeh6AD.s:1314: Error: selected processor does not support `smc 0' in ARM mode
/tmp/ccEeh6AD.s:1459: Error: selected processor does not support `smc 0' in ARM mode
/tmp/ccEeh6AD.s:1654: Error: selected processor does not support `smc 0' in ARM mode
/tmp/ccEeh6AD.s:1847: Error: selected processor does not support requested special purpose register -- `msr DAIFSET,#2'
/tmp/ccEeh6AD.s:1904: Error: selected processor does not support requested special purpose register -- `msr DAIFSET,#2'
/tmp/ccEeh6AD.s:2203: Error: selected processor does not support `smc 0' in ARM mode
/tmp/ccEeh6AD.s:3901: Error: selected processor does not support `smc 0' in ARM mode
/tmp/ccEeh6AD.s:5426: Error: selected processor does not support `smc 0' in ARM mode
/tmp/ccEeh6AD.s:5552: Error: selected processor does not support `smc 0' in ARM mode
/tmp/ccEeh6AD.s:5883: Error: selected processor does not support `smc 0' in ARM mode
cc1: warning: switch '-mcpu=cortex-a5' conflicts with '-march=armv7-a' switch
In file included from ./include/portable.h:53,
from ./include/FreeRTOS.h:65,
from timers.c:37:
./portable/GCC/ARM_CA53_64_BIT/portmacro.h:71: warning: "portBYTE_ALIGNMENT" redefined
71 | #define portBYTE_ALIGNMENT 16
|
In file included from ./include/FreeRTOS.h:59,
from timers.c:37:
./FreeRTOSConfig.h:43: note: this is the location of the previous definition
43 | #define portBYTE_ALIGNMENT 32
|
In file included from ./include/portable.h:53,
from ./include/FreeRTOS.h:65,
from timers.c:37:
./portable/GCC/ARM_CA53_64_BIT/portmacro.h:105: warning: "portDISABLE_INTERRUPTS" redefined
105 | #define portDISABLE_INTERRUPTS() \
|
In file included from ./include/FreeRTOS.h:59,
from timers.c:37:
./FreeRTOSConfig.h:42: note: this is the location of the previous definition
42 | #define portDISABLE_INTERRUPTS
|
/tmp/ccEeh6AD.s: Assembler messages:
/tmp/ccEeh6AD.s:725: Error: selected processor does not support `smc 0' in ARM mode
make: *** [Makefile:36: GCC] Error 1
Think I just need to get pointed into the right direction with the correct cross compiler to use, the appropriate flags and portiable.
If listed. Please also just a brief installation help as I am still new to Linux-mint and learning.
Thank you in advance.
GreenDragonZA