Hi,
I try run demo application for core to core communication, but I get assertion that CM4 core doesn’t see contents initialized by CM7 core.
Here is place where program stopped:
configASSERT( ( xControlMessageBuffer != NULL ) && ( xDataMessageBuffers[ 0 ] != NULL ) && ( xDataMessageBuffers[ 1 ] != NULL ) );
MessageBufferLocations.h
#ifndef MESSAGE_BUFFER_AMP_H
#define MESSAGE_BUFFER_AMP_H
/* Enough four 4 8 byte strings, plus the additional 4 bytes per message
overhead of message buffers. */
#define mbaTASK_MESSAGE_BUFFER_SIZE ( 60 )
#define mbaCONTROL_MESSAGE_BUFFER_SIZE ( 24 )
/* The number of instances of prvM4CoreTasks that are created. */
#define mbaNUMBER_OF_CORE_2_TASKS 2
/* A block time of 0 simply means, don't block. */
#define mbaDONT_BLOCK 0
/* Place the message buffers at a fixed location so it is the same for both
cores. */
MessageBufferHandle_t xControlMessageBuffer __attribute__((section(".RAM_D3_Z1")));
MessageBufferHandle_t xDataMessageBuffers[ mbaNUMBER_OF_CORE_2_TASKS ] __attribute__ ((section (".RAM_D3_Z2")));
static uint32_t ulStartSyncCounters[ mbaNUMBER_OF_CORE_2_TASKS ] __attribute__ ((section (".RAM_D3_Z3")));
/* The variable used to hold the stream buffer structure.*/
StaticStreamBuffer_t xControlMessageBufferStruct __attribute__ ((section (".RAM_D3_Z4")));
StaticStreamBuffer_t xDataMessageBufferStructs[mbaNUMBER_OF_CORE_2_TASKS] __attribute__ ((section (".RAM_D3_Z5")));
/* Used to dimension the array used to hold the streams.*/
/* Defines the memory that will actually hold the streams within the stream buffer.*/
static uint8_t ucControlBufferStorage[ mbaCONTROL_MESSAGE_BUFFER_SIZE ] __attribute__ ((section (".RAM_D3_Z6")));
static uint8_t ucDataBufferStorage[mbaNUMBER_OF_CORE_2_TASKS][ mbaTASK_MESSAGE_BUFFER_SIZE ] __attribute__ ((section (".RAM_D3_Z7")));
#endif /* MESSAGE_BUFFER_AMP_H */
Can somone help handle this problem ?