FreeRTOS cause fault after SoftReset

Kernel
1

schisanoa wrote on Friday, October 04, 2019:

Hi,

I have a little problem on a LPC4357 running FreeRTOS 8.2.

Problem is that when I execute a SoftReset MCU restart but during EMC SDRAM initialization it stop working, with loss of LPC-Link 2 debugger control. So, no HardFault, olny stop ecxecution.

The function where CPU stop working is this: SystemInit_ExtMemCtl (void). From some research I think it should be a Stack Pointer problem, but not sure about that, FreeRTOS Heap in my application is located in External SDRAM, and if I call the SoftReset routine before FreeRTOS start no problem with EMC init.

If I made a SoftReset after these instruction, system stop working during initialization in the Reset ISR.

The same code work right with a LPC4088 in the same condition (Ext RAM FreeRTOS Heap, same reset routine) with no problem.

In LPC 4357 I’m working only with Core M4

Thanks in advance to anyone who could help me.

2

rtel wrote on Friday, October 04, 2019:

I have a little problem on a LPC4357 running FreeRTOS 8.2.

Yikes, why so old? Later versions have a lot of additional error
checking asserts.

Problem is that when I execute a SoftReset MCU restart but during EMC
SDRAM initialization it stop working, with loss of LPC-Link 2 debugger
control. So, no HardFault, olny stop ecxecution.
The function where CPU stop working is this: SystemInit_ExtMemCtl
(void). From some research I think it should be a Stack Pointer problem,
but not sure about that, FreeRTOS Heap in my application is located in
External SDRAM, and if I call the SoftReset routine before FreeRTOS
start no problem with EMC init.

Can you explain what the soft reset does? In particular, what does it
do with interrupt enable/disable registers? What does it do with bus
interfaces used to access external memory?

3

schisanoa wrote on Monday, October 07, 2019:

Richard, thanks for your feedback.
I’m working with 8.2 because is the version already used on the firmware I’m working on. This firmware was developed from another person, and now I should debug problem and implement new function.

Here more informations:

  1. Heap_4.c is used, and Heap is located in External SDRAM

  2. Before SoftReset all interrupt are disabled

  3. Here the reset code:

    __disable_irq();
    SCB->VTOR = 0x1A010000 & 0x1FFFFF80; //relocating vector table
    p = (unsigned *)(0x1A010000 + 4);
    user_code_entry = (void *) *p;
    user_code_entry();

(this code is exactly the same (except for address) that is working on a LPC 4088 with FreeRTOS 7 without problem, same condition, Heap4, Heap in ext SDRAM etc)

  1. during reset PC go to the Reset vector, so every peripheral is re-initialized, also the EMC Bus for external SDRAM

Thanks
Alessio

4

schisanoa wrote on Tuesday, October 08, 2019:

I fixed the problem. Below you can find the solution, hope it helps other user in the future. Simply need to restore the PSP and MSP before reset.

void (*user_code_entry)(void);
unsigned *p;

void SoftReset(void){

    __disable_irq();

    SysTick->CTRL = 0; // Disable System timer

    // disable and clear pending IRQs
    for (uint32_t i = 0; i < 8; i++)
    {
        NVIC->ICER[i] = 0xFFFFFFFF; // disable IRQ
        NVIC->ICPR[i] = 0xFFFFFFFF; // clear pending IRQ
    }

    // Barriers
    __DSB();    // data synchronization barrier
    __ISB();    // instruction synchronization barrier

    SCB->VTOR = 0x1A010000 & 0x1FFFFF80;

    // Rebase the Stack Pointer
    __set_MSP(*(uint32_t *) (0x1A010000 & 0x1FFFFF80));
    __set_PSP(*(uint32_t *) (0x1A010000 & 0x1FFFFF80));

    p = (unsigned *)(0x1A010000 + 4);
    user_code_entry = (void *) *p;


    __DSB();
    __ISB();

    user_code_entry();
}

Thanks again for interesting
5

rtel wrote on Tuesday, October 08, 2019:

Thanks for reporting back with the solution.