maeikel wrote on Thursday, October 20, 2011:
Hi
I have a question about how FreeRTOS kernel and NVIC Interrupt nesting work together.
I’m running FreeRTOS on the STM3210E-Eval-Board.
I would like to know how the priorities are according to each other.
Therefore, I made the following definitions within FreeRTOSConfig.h:
#define configKERNEL_INTERRUPT_PRIORITY (15 << (8-configPRIO_BITS)) /* equivalent to NVIC priority 15 */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY (3 << (8-configPRIO_BITS)) /* equivalent to NVIC priority 3 */
where configPRIO_BITS was defined as 4 and the number of priority levels was chosen to 5.
Furthermore, I have two tasks running. One is just doing some stupid work (togeling an LED and incrementing a counter), whereas the other task blocks on a binary semaphore which is activated over a button-press isr call to the EXTI15_10_IRQHandler (stm32f10x_it.c)
Now I wanted to test whether I can put the NVIC Priorities such that whatever interrupt occurs, my highest priority 5 task is not disturbed. For me the logical consequence would be that interrupts with NVIC Priority of (configMAX_SYSCALL_INTERRUPT_PRIORITY+1) and higher would never interrupt my highest priority task.
So setting a priority of 5 for both tasks (LED toggling and Button Task) with a NVIC Priority of configMAX_SYSCALL_INTERRUPT_PRIORITY+1 for the button-interrupt, the LED toggling task get’s still interrupted. Even if I set the NVIC pririty of the button interrupt to 0x0F (lowest priority for NVIC_PriorityGroup_4).
Does anyone know, what I missunderstand? Because my basic problem I wanted to face with this little test setup is that I’m reading from 2 SPI busses parallelly in two different tasks. The reading itself (setting the chip selects and reading spi data) I want to prevent from being disturbed, as I have other parallel tasks running and the data I get up to now is not reliable.
I tried out mutual exclusion. This at least prevents my two spi tasks to read from the same spi at the time. But it’s not assured that this section is not interrupted though by some other higher priority tasks or any kind of NVIC interrupt (as it seems to me after my little test). Or does one use critical sections in this case? But this critical sections disable the NVIC interrupts at all, but what I want is that the NVIC interrupts are though handled, but after my Priority 5 Tasks have finished.
Thank you for your help
Best
Michael
And what is the “configLIBRARY_KERNEL_INTERRUPT_PRIORITY” good for?!