Free RTOS - strange behavior on Cortex-M3.

ravikiranhv wrote on Wednesday, April 26, 2017:

Hello experts,

I am working on freeRTOS V9.0 on Cortex M3. I have two application threads and 2 interrupts. Both the threads blocks on event which are posted by interrupts (I am using API ending with ISR from interrupts). Evevryting works fine if I have multiple thread and a single interrupt.
Have multiple randomobservation on my setup on each boot.
Case-1: System hangs after starting RTOS. Both threads and Interrupts not working
Case-2: Threads are not running but both the interrupts working !
Case-3: Threasds start running automatically after some time (about 60 seconds) after 10/20 interrupt processing
Case-4: Everything works fine without any problem

I understood freeRTOS configuration requirement for interrupts from here and everything looks fine !

Appreciate your bvaluable feedback :slight_smile:


edwards3 wrote on Wednesday, April 26, 2017:

Do you have configASSERT() defined?
Which M3 are you using and what is configMAX_SYSCALL_INTERRUPT_PRIORITY set to?

ravikiranhv wrote on Thursday, April 27, 2017:

Yes configASSERT() is defined. Our Cortex M3 implements 3 bits(MSB) for priority
configMAX_SYSCALL_INTERRUPT_PRIORITY (191) //(i.e. priority 5).

Both ISR’s calling free RTOS API’s are set to priority 240.

Please suggets if I am missing anything.

Thanks in advance

rtel wrote on Thursday, April 27, 2017:

240 is actually using 4 bits, but that shouldn’t matter because the
unimplemented bit will be ignored anyway.

Can you please say which chip you are using - if it is an STM32 then you
also have to explicitly tell it not to sub-divide the priorities. Are
you 100% sure it has three priority bits defined? We have had incidents
where documentation on this has been wrong, which is why the head
revision Cortex-M code in SVN has additional asserts() to actually
measure this to determine if the configuration file settings are correct.

ravikiranhv wrote on Saturday, April 29, 2017:


Thanks for the inputs.

I am using Max32550 controller from Maxim with 3 bit priority implementation.

Please suggest how to go about.

Appreciate your help

rtel wrote on Sunday, April 30, 2017:

Try setting configKERNEL_INTERRUPT_PRIORITY to 224, and if that does not
help, update to the latest version of port.c, which contains more
configASSERT() statements. Link assumes GCC, and the new asserts assume
either __NVIC_PRIO_BITS or configPRIO_BITS is set to 3 in