Failed to build Cyclone V SoC FreeRTOS Demo

anchen wrote on Monday, January 25, 2016:

http://www.freertos.org/RTOS_Altera_SoC_ARM_Cortex-A9.html

Build Instructions
Step 5:

Note: If the dialogue box tab shown in the image below is missing, or contains an error message, then it is likely your version of DS-5 does not have the CDT cross compiler plug in installed. If this is the case the plug in can be installed manually by following the instructions provided on the ARM website. It will be necessary to create a new workspace after the plug-in has been installed.

My version of DS-5 does not have the CDT cross compiler plug in installed.
But I failed to install it manually by following the instructions provided on the ARM website.

Can anyone help me on this?

Thanks,
Ann

rtel wrote on Monday, January 25, 2016:

One of the best things about using Eclipse as a standard IDE is that each installation is different, and installations from the same vendor change ;o)

I can do my best to assist, but really this is a DS-5 or Eclipse issue, rather than a FreeRTOS issue, and the support request might elicit a more knowledgeable response if directed to ARM support.

Can you please post a screenshot of the tools settings dialogue, equivalent to this: http://www.freertos.org/Setting_the_path_to_the_Altera_compiler.png but for your installation.

rtel wrote on Monday, January 25, 2016:

I just did a quite Google on this and found the following page, does it help?
http://ds.arm.com/debugging-on-bare-metal-targets-using-ds-5-and-gcc-compiler/

anchen wrote on Monday, January 25, 2016:

Thanks for your response.

I can now build the RTOSDemo.axf.
But I make it by a lot of manual efforts.

  1. I have to assign all needed include paths one by one.
  2. I have to remove alt_interrupt_armcc.c since the arm-altera-eabi-gcc can not support the instructions in it.
  3. I have to remove fpga_support.c since there is no fpga configruation file named soc_system_dc_rbf which needs to be linked together.

The issue I raised is not a DS-5 or eclipse issue.

rtel wrote on Monday, January 25, 2016:

Perhaps these are necessitated by the different DS-5 version. I’m not
sure of the effect of the changes you are making, for example, removing
fpga_support.c. I think we have each other’s email addresses, so can
converse on the changes required, and so document them too.

mojcmos wrote on Tuesday, October 18, 2016:

Hi,
I have many problems to use CORTEX_A9_Cyclone_V_SoC_DK example. Cross GCC did not added to my compiler list in the DS-5 for Quatus 15.0.
what is the promblem?
best regards

rtel wrote on Tuesday, October 18, 2016:

Different Eclipse versions (DS-5 uses Eclipse) seem to have different
methods of adding support for different compilers. I would recommend
looking on the DS-5 website for an application note of post that lets
you know how to do it.

xkentx wrote on Friday, October 21, 2016:

Hello everyone! This is my notes “How to build and run FreeRTOS on Altera SOC kit” for this DevBoard:
http://www.terasic.com.tw/cgi-bin/page/archive.pl?CategoryNo=167&No=816
I used:

  1. Quartus || 64-bit ver 14.1 buid 186
  2. DS-5 Altera Edition. Ver 5.20.0. Build 5200024
  3. FreeRTOSv9.0.0 (https://sourceforge.net/projects/freertos/files/latest/download?source=files)
    I had problem with step 5 (http://www.freertos.org/RTOS_Altera_SoC_ARM_Cortex-A9.html) too. And I couldn’t find “cross GCC compiller” needed for build. Then I decided to use arm-altera-eabi-* toolchain which installed with DS-5.
    For building SPL switch of watchdog timer and switch on checkbox “Boot from QSPI”. Another settings are default. You will need u-boot-spl file for run rtos_arm under debugger.
    Program rtos.sof file into the board. This file only needs for blinking the LEDs from RTOS tasks (pLED). Led0 blinks when tick rtos occur. Led1 blinks when prvQueueTask is executed. Led2 blinks when prvQueueReceive is executed.
    Extract the attachment rtos_arm.rar file next to “spl_bsp” in the software folder of your FPGA project.
    rtos_arm folder contain MakeFile which uses for build project. It also copys ./spl_bsp/ uboot-socfpga/spl/ u-boot-spl to the current folder(rtos_arm).
    In the DS-5 import project as “Existing code as makefile project”, then you can build rtos_arm project.
    For debugging rtos in the DS-5 see dbg_readme.docx.
    PS
    Don’t use uart0_printf() in tasks :slight_smile:

rtel wrote on Friday, October 21, 2016:

Great - thanks for your effort in providing this information.

magnuslauritsen wrote on Thursday, June 08, 2017:

Hi, I had this same experience, first the Cross GCC compiler unknown by DS-5. By Altera I have been told that the bare-metal GCC compiler is no longer included in DS-5, since Quartus version 15.1. Now they only rely on the arm-compiler. I have 16.1 installed. Have considdered to install quartus 15.0 and the repective DS-5 version, to be able to follow this guide.
I found some GCC compilers available as plugin, but still they are not regognized as the same compiler, as mensioned in the project-file. If I select an other compiler, all compiler-settings are lost incl. all include-paths.
I was able to build Stanislavs project, but I could not run the debug. Tried to convert the axf output file to a binary image-file in two steps, using -objcopy and mkimage. Somehow this file became zero-paded up to 4GB. mkimage was not able to read the giant file. I removed these ekstra zeros in a hex-editor and tried to boot the image from a sd-card with a preloader, built for a hello-world example. Got no error, but neither any action.
It would be good to know where to find the correct compiler and whitin which version-frame this demo works.
It would also be good if the guide continued to a bootable system.

magnuslauritsen wrote on Wednesday, June 14, 2017:

Problem solved:
I just want to share some solutions to boot the project from SD-card
First to solve the GCC issue, install the the CDT for your version of ds-5/Eclipse from
CDT Downloads, see help -> Eclipse platform.
Based on my hand off files, I have constructed a preloader, according to instructions from Altera:
Boot Guide, page 18
in the embedded command shell for SoCEDS, using the command: arm-altera-eabi-readelf --sections RTOSDemo.elf I can see that the section .text is located at 0x100000 and .cs.oc_ram with size 0xc800 is located at 0xffff0000. This explanes the huge bin-file when using the objcopy tool. The empty space is zero-padded. I used the command:
arm-altera-eabi-objcopy -R .cs3.oc_ram -O binary RTOSDemo.elf RTOSDemo.bin
to generate the binary file without the .cs3.oc_ram section. I can’t predict the effect of removing this section.
Next I generated the image to load from 0x100000 with the command:
mkimage -A arm -T standalone -C none -a 0x100000 -e 0 -n “baremetal image” -d RTOSDemo.bin RTOSDemo-mkimage.bin
This gave me an image file of 51kB for the blinky compilation. I copied the image file to the fat-portion of the SD-card, plugged it in and it booted.
I have also changed the LED-address to reflect my HW. Added some dummy functions in main_blinky before creating tasks, to control LEDs from the debugger without the timer/interrupt.