dspic33 - keeps rebooting

ltran2016 wrote on Thursday, February 18, 2016:

I’m in the processing of bringing up the dsPIC DSC start kit and I think I have all my bases covered, but apparently that isn’t the case. I’ve already trawled through the discussions for any issue related to this, but it hasn’t helped. I’m loading a simple build that just blinks an LED periodically. The problem is it looks as if something keeps resetting the processor. I’m clearing the watchdog, but it doesn’t seem to have any effect.

Could someone give this a look and tell me where I might be going wrong. I’ve successfully implemented FreeRTOS on NiosII, so I’m not a newbie at this.

#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H

#define MPLAB_DSPIC_PORT

#include <p33FJ256GP506.h>

#define configUSE_PREEMPTION              1
#define configUSE_IDLE_HOOK               0
#define configUSE_TICK_HOOK               0
#define configTICK_RATE_HZ                ((TickType_t) 1000)
#define configCPU_CLOCK_HZ                ((unsigned long) 12000000)  /* Fosc / 2 */
#define configMAX_PRIORITIES              (4)
#define configMINIMAL_STACK_SIZE          (105)
#define configTOTAL_HEAP_SIZE             (( size_t ) 8192)
#define configMAX_TASK_NAME_LEN           (4)
#define configUSE_TRACE_FACILITY          0
#define configUSE_16_BIT_TICKS            0
#define configIDLE_SHOULD_YIELD           0

/* Co-routine definitions. */
#define configUSE_CO_ROUTINES             0
#define configMAX_CO_ROUTINE_PRIORITIES   (2)

/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */

#define INCLUDE_vTaskPrioritySet          1
#define INCLUDE_uxTaskPriorityGet         1
#define INCLUDE_vTaskDelete               1
#define INCLUDE_vTaskCleanUpResources     0
#define INCLUDE_vTaskSuspend              1
#define INCLUDE_vTaskDelayUntil           1
#define INCLUDE_vTaskDelay                1


#define configKERNEL_INTERRUPT_PRIORITY   0x01

// FBS
#pragma config BWRP = WRPROTECT_OFF     // Boot Segment Write Protect (Boot Segment may be written)
#pragma config BSS = NO_FLASH           // Boot Segment Program Flash Code Protection (No Boot program Flash segment)
#pragma config RBS = NO_RAM             // Boot Segment RAM Protection (No Boot RAM)

// FSS
#pragma config SWRP = WRPROTECT_OFF     // Secure Segment Program Write Protect (Secure Segment may be written)
#pragma config SSS = NO_FLASH           // Secure Segment Program Flash Code Protection (No Secure Segment)
#pragma config RSS = NO_RAM             // Secure Segment Data RAM Protection (No Secure RAM)

// FGS
#pragma config GWRP = OFF               // General Code Segment Write Protect (User program memory is not write-protected)
#pragma config GSS = OFF                // General Segment Code Protection (User program memory is not code-protected)

// FOSCSEL
#pragma config FNOSC = FRC              // Oscillator Mode (Internal Fast RC (FRC))
#pragma config IESO = OFF               // Two-speed Oscillator Start-Up Enable (Start up with user-selected oscillator)

// FOSC
#pragma config POSCMD = NONE            // Primary Oscillator Source (Primary Oscillator Disabled)
#pragma config OSCIOFNC = ON            // OSC2 Pin Function (OSC2 pin has digital I/O function)
#pragma config FCKSM = CSDCMD           // Clock Switching and Monitor (Both Clock Switching and Fail-Safe Clock Monitor are disabled)

// FWDT
#pragma config WDTPOST = PS32768        // Watchdog Timer Postscaler (1:32,768)
#pragma config WDTPRE = PR128           // WDT Prescaler (1:128)
#pragma config WINDIS = OFF             // Watchdog Timer Window (Watchdog Timer in Non-Window mode)
#pragma config FWDTEN = OFF             // Watchdog Timer Enable (Watchdog timer enabled/disabled by user software)

// FPOR
#pragma config FPWRT = PWR8             // POR Timer Value (8ms)

// FICD
#pragma config ICS = PGD1               // Comm Channel Select (Communicate on PGC1/EMUC1 and PGD1/EMUD1)
#pragma config JTAGEN = OFF             // JTAG Port Enable (JTAG is Disabled)

//-------------------------------------------------------------------------
LED *LED_Init (SYS_INT_t period, SYS_INT_t set_task_priority, SYS_INT_t clr_task_priority) {
//-------------------------------------------------------------------------
   // allocate led space
   LED  *pLED = (LED *)(pvPortMalloc (sizeof(LED)));


   // exit if space couldn't be allocated
   if (pLED == NULL) return NULL;
   
   // initialize yellow led port pin
   PORT_BIT_TRI(C,13) = 0;
   PORT_BIT_LAT(C,13) = 0;
   
   // initialize red led port pin
   PORT_BIT_TRI(C,14) = 0;
   PORT_BIT_LAT(C,14) = 0;
   
   // initialize green led port pin
   PORT_BIT_TRI(C,15) = 0;
   PORT_BIT_LAT(C,15) = 0;
   
   // set heart beat period
   LED_HEARTBEAT_PERIOD = period;

   // allocate led messeging queue, start task if queue space allocated
   LED_QUEUE = xQueueCreate (32, sizeof(LED_MSG));
   if (LED_QUEUE != NULL) {
      // led gateway clear control task
      xTaskCreate (
         LED_Clr_Task,
         "LedClear",
         32,
         (void *)pLED,
         clr_task_priority,
         NULL);
   }

   return pLED;
}

//-------------------------------------------------------------------------
static void LED_Clr_Task (void *pvParam) {
//-------------------------------------------------------------------------
   //LED  *pLED = (LED *)pvParam;
   U32   idx;
   portTickType   xLastWakeTime;
   
   
   // get initial wake count, next hearbeat time
   xLastWakeTime = xTaskGetTickCount ();
   //xHeartBeatTime = xLastWakeTime + (portTickType)LED_HEARTBEAT_PERIOD;

   // task loop
   for (;;) {
      
      // wait 100 ticks
      vTaskDelay (100);
      // clear watchdog timer
      ClrWdt();
      PORT_BIT_LAT(C,15) = ~PORT_BIT_LAT(C,15);    // toggle pin (amber LED on demo board DM330011)
      
      // wait 100 ticks
      vTaskDelay (100);
      // clear watchdog timer
      ClrWdt();
      PORT_BIT_LAT(C,15) = ~PORT_BIT_LAT(C,15);
      
      vTaskDelayUntil (&xLastWakeTime, 300);
      // clear watchdog timer
      ClrWdt();
   }

   // delete task when complete
   vTaskDelete(NULL);
}

rtel wrote on Thursday, February 18, 2016:

Have you tried turning the watchdog off altogether? Do you have configASSERT() defined? Is configCHECK_FOR_STACK_OVERFLOW set to 2?

ltran2016 wrote on Thursday, February 18, 2016:

Thank you for the prompt response.

I think I turned off the watchdog based on the #pragma config settings, but I’m no so sure it’s working. I think the watchdog can’t be turned off. It can only be reset, based on what I’ve read from the data sheets. Don’t take that as truth. I’ve not completely read it all yet. This is my first time dealing with this particular processor, so I’m still learning all the quirks and issues.

I have not tried configASSERT() yet. Haven’t configured for overflow check either. I’ll enable them and see what happens. I’ve run it through the hardware debugger. That’s how I discovered the resetting problem.

ltran2016 wrote on Thursday, February 18, 2016:

I figured out my problem. I wasn’t allocating enough stack space to task, so I was overflowing into who knows where.

alainm3 wrote on Friday, February 19, 2016:

I said so… to your first post…

this is the cost common cause for that, 100% for me :wink:

Alain

On 18-02-2016 20:17, Loi Tran wrote:

I figured out my problem. I wasn’t allocating enough stack space to
task, so I was overflowing into who knows where.


dspic33 - keeps rebooting
https://sourceforge.net/p/freertos/discussion/382005/thread/68f88dde/?limit=25#5d7d


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