Does FreeRTOS support Memory Protection Unit (MPU) for ARM Cortex M0+

According to below, FreeRTOS does not provide MPU support to ARM Cortex M0+?

Hey @shamrex22 and welcome to the FreeRTOS Community!
So we unfortunately don’t have a ready to use and compile ARM Cortex M0+ port with the MPU enabled. This question has come up before up on the forum as seen here and here. This means that if you need to an MPU working on this processor that you might want to start with our existing M0 ports and then add in the MPU functionality based off of the M3 MPU port.

That said, I did take a look through the ARM CM3 and the ARM CM0+ MPU related documentation and it appears to be very similar. One difference is in the MPU Region Attribute and Size Register use different bits for their Shareable, Cacheable, and Bufferable bits. These differences can be seen in bits 18, 17, and 16 for the M0 and the M3. This gets expanded upon on in the “MPU Access Permissions Attributes” tab in the above links. These similarities are why I wanted to point you to the existing M3 MPU port. As it might be possible to lift the MPU portions of the port and with some changes get them working on the M0 port.

I hope this is information is useful, and if there are any questions you have please feel free to ask! Then if you do end up working on a Cortex M0+ Port with the MPU enabled we’d be excited to see your contribution to the repository!

Thanks for the clarification. I highly appreciate your response