Deferred Interrupt Processing and posting a Binary Semaphore more than once

[aggarg (Gaurav Aggarwal)]

@carlk3

For processors based on the Armv8-M Mainline architecture, each of the stack pointers has a corresponding stack limit register which allows software to define watermark levels for stack overflow detection, and when stack overflow occurs, a Usage fault or HardFault exception is triggered.

FreeRTOS Cortex-M33 ports do program the stack limit register for each task - as a result, any stack overflow triggers a Usage fault or HardFault exception.

Thanks.