Custom ISA Requirements

Kernel
1

I am building a 16-bit CPU out of relays. What features in the hardware are needed or expected for freeRTOS to run? I have the following in hardware:

  • List item

  • add

  • or

  • nor

  • and

  • xor

  • nand

  • mv

  • mv if equal

  • mv if greater

  • rotate left

  • rotate right

  • shift left

  • shift right

  • shift left artithmetic

  • shift right arithmetic
    and I have the following registers

  • List item

  • A

  • B

  • C

  • D

  • PC

  • FLAGS

  • ACUM
    What other features does the minimum freeRTOS expect?

2

The first requirement to use FreeRTOS on the processor is to have a compatible C compiler, so you can compile the code for the project. While you can possible use an open source complier as a starting point, you will need to think how you can implement all the requirements that it needs in the processor.

A few real important features are:

  • The code generation needs to be “thread-safe” and not use scratch memory that would cause issues with multiple tasks accessing the same scratch memory
  • This means that the code should largely be using a “stack” for most scratch memory storage, with the ability to change the stack pointer from one stack to another to change what task is running
  • The processor will need to have some interrupts, especially with an ability to get a periodic “tick” interrupt to provide a time base for the system.
  • The processor needs to have some way to save ALL the status of the current processing (or at least all that the C implementaiton needs to be saved) onto the stack, so you can save the current state onto the stack, and then resume it later.

These are features well beyond the details you mentioned, but are the sort of things you need to be thinking of.

Building such a processor with relays would be a monumental amount of work. I suppose the big question is what are you planing to use as your memory?

1 Like
3

I am going to be using the cheapest SRAM on dip package possible. The processing time for each operation will be many times slower than the slowest chip.

The ticks will need to be set in the 10s of milliseconds at the fastest, and there is room for interrupts and rings to he added to the ISA.

The logic has been built, but it is just a matter of ordering and debugging the boards.

Is there a list of the minimum C standard that’s needed. I want to strip down the smallest C compiler I can find that’s compatible and self host directly on the machine.

4

I don’t think we have list for minimum C standard, that’s needed. The minimum C standard that is required is C89.

I also suggest you take a look at our documentation here RTOS Implementation - FreeRTOS™

5

What is the smallest known compatible compiler? I would like to push implement my isa and begin testing compilations to my architecture as I build and test the hardware.

6

Any compiler that can compile C89 code and generate binary for your target should be good. You can look at GCC or Clang.

7

I doubt you will be able to run at a system tick of 10s of milliseconds. That is a common frequency for processors running at speeds in the megahertz, but I can’t see you running a relay based design anywhere near that. That might be more like your processor instruction rate for mechanical relays, and your instruction set is likely going to be less efficient then a typical processor, as you will have a lot fewer “gates” to build your processor.

If you are thinking of “self-hosting” the complier, that will likely be a bigger lower limit on the capabilities of your processor than FreeRTOS.

I do suggest you look at what capabilities you really expect your processor to be able to do, and develop a reasonable expectation for what you will get out of it.