Cortex R4 Port - Problems with Task Switching

Hi,
I am trying to port the CORTEX_R4_RM48_TMS570_CCS5 demo to another TI processor (AWR1642, which is also an R4 ). Further more, I am using the most recent TI compiler (TLS 18.12.14).
Now I have the interrupts setup correctly (vPortPreemptiveTick is called via an FIQ dispatcher). But inside the vPortPreemptiveTick there is something wrong. It looks like the call xTaskIncrementTick is overwriting the stack when entering the function (including the saved return adress, so after the portRESTORE_CONTEXT call the LR is pointing to a wrong address, ultimately leading to a an abort), as the stack pointer was not decremented before that call as this port is using the LR in the portSAVE_CONTEXT function.
I already searched through this board and found some hints regarding the system is not in Supervisor mode after startup, but this is definitely the case.
I got a bis desperate and manipulated the SP before calling xTaskIncrementTick, so that it can be restored after the function. After that, the system is running, but no tasks besides TMR SVC are called…
Any Ideas here?
Changing the R4 Port doesnt seem right for me, so I guess I am missing some compiler settings or similar somewhere…

You are right that you need to start the scheduler in Supervisor mode, but you also need to assign a stack to each mode in the startup code. Check the startup code (step through it ideally, or attach it to a post here even) to find a sequence that goes into each CPU mode, configures a stack for that mode, then moves to the next mode to do the same, etc.

Hi Richard,
the code below sets up the stack pointer (it is called before main(), I checked that already). Also, I see that the R13 register of each mode is pointing correctly at the beginning of main.

.def _coreInitStackPointer

_coreInitStackPointer:
msr cpsr_c, #0xD1
ldr sp, fiqSp
msr cpsr_c, #0xD2
ldr sp, irqSp
msr cpsr_c, #0xD7
ldr sp, abortSp
msr cpsr_c, #0xDB
ldr sp, undefSp
msr cpsr_c, #0xDF
ldr sp, userSp
msr cpsr_c, #0xD3
ldr sp, svcSp
bx lr

abortSp .word 0x00000000+0x00000000
undefSp .word 0x00000000+0x00000000

svcSp .word 0x08000000+0x00000200
irqSp .word 0x08000200+0x00000200
fiqSp .word 0x08000400+0x00000400
userSp .word 0x08000800+0x00000f00

Also, i attached the registers at the beginning of main()

I made some progress. I created a new project from scratch, added the example code and changed only of what I needed to change for sure. Now the Context Switching seems to work, there is no exception thrown anymore. There still are problems, but different ones. For this i created a new topic.