On this page: http://www.freertos.org/RTOS-Cortex-M3-M4.html
An aside: FreeRTOS API functions that are safe to be called from an interrupt use BASEPRI to implement interrupt safe critical sections. BASEPRI is set to config MAX_SYSCALL_INTERRUPT_PRIORITY when the critical section is entered, and 0 when the critical section is exited. Many bug reports are received that claim BASEPRI should be returned to its original value on exit, and not just set to zero, but the Cortex-M NVIC will never accept an interrupt that has a priority below that of the currently executing interrupt - no matter what BASEPRI is set to. An implementation that always sets BASEPRI to zero will result in faster code execution than an implementation that stores, then restores, the BASEPRI value (when the compiler’s optimiser is turned on).
However, when I go to the official ARM Cortex M4 documentation at
I see that in table 2.9 they claim that writing 0x00 to BASEPRI has no effect.
If this is the case, then this write of 0 to BASEPRI is just a wasted operation. Is there a contradiction here? There seems to be something I am not understanding here…