gigglergigger wrote on Friday, October 09, 2015:
Hi,
I’ve enabled configASSERT macro in my app config and noticed FRTOS now complaining (asserting) due to interrupts having wrong POR priority. They are all 0.
System information:
LPCXpresso v7.9.2 [Build 493] [2015-09-14]
FreeRTOS V7.5.3
Cortex M3 (LPC1769)
LPCOpen (no idea?)
core_cm3 (v3.20, came with lpcopen)
Using IRQ’s for I2C, CAN and UART.
From CMSIS:
__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
if(IRQn < 0) {
SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M System Interrupts /
else {
NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } / set Priority for device specific Interrupts */
}
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
if ((ticks - 1) > SysTick_LOAD_RELOAD_Msk) return (1); /* Reload value impossible */
SysTick->LOAD = ticks - 1; /* set reload register /
NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); / set Priority for Systick Interrupt /
SysTick->VAL = 0; / Load the SysTick Counter Value /
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; / Enable SysTick IRQ and SysTick Timer /
return (0); / Function successful */
}
these are in my config:
configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0x1f
configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
enum eIRQPRIORITY {
eIRQPRIORITY_I2C =configLIBRARY_LOWEST_INTERRUPT_PRIORITY+0x03, // ISR does not invoke freeRTOS API
eIRQPRIORITY_CAN =configLIBRARY_LOWEST_INTERRUPT_PRIORITY+0x02,
eIRQPRIORITY_UART =configLIBRARY_LOWEST_INTERRUPT_PRIORITY+0x01, // highest for this application
};
These are now my prioritys using CMSIS, like
NVIC_SetPriority(xIRQn, eIRQPRIORITY_I2C);
Even on this forum there are people who in their posts are using low values for this function but I found I could not use anything lower than configLIBRARY_LOWEST_INTERRUPT_PRIORITY, if I do the interrupt is’nt serviced.
Originally I noticed every priority set to 0 (highest), so naturally I set them as follows:
NVIC_SetPriority(I2Cx, 3); // lowest does not matter
NVIC_SetPriority(CANx, 2);
NVIC_SetPriority(UARTx 1); // highest user IRQ (lower than system tick for OS)
But the above fails to generate interrupts.
When I look at the NVIC_SetPriority(…) it does the shifts internally (code above), so why do i have to put anything higher than 0x1f? The odd thing I found is SysTick_Config(…) which I am not using is in the same CMSIS header file, yet it shifts like what is done within the SetPriority call.
Why does this not work?
NVIC_SetPriority(I2Cx, 3); // lowest does not matter
but this seems to?
NVIC_SetPriority(I2Cx, 0x1f + 3); // lowest does not matter
Regards
dc