Cortex-A and Cortex-R irq stack not 8-byte aligned?

rudi1895 wrote on Tuesday, September 27, 2016:

The example files named portASM.s in the FreeRTOS V9.0.0 and earlier demos for Cortex-A and Cortex-R devices contain the following instruction sequence:

	/* Ensure bit 2 of the stack pointer is clear.  r2 holds the bit 2 value for
	future use. */
	MOV		r2, sp
	AND		r2, r2, #4
	SUB		sp, sp, r2

	/* Call the interrupt handler. */
	PUSH	{r0-r3, lr}
	LDR		r1, vApplicationIRQHandlerConst
	BLX		r1
	POP		{r0-r3, lr}
	ADD		sp, sp, r2

The first three instructions adjust the IRQ stack to be 8-byte aligned. But the following instruction pushes five registers on the stack. IMHO this push will result in an unaligned stack for the called handler.

The instruction sequence proposed for this purpose by ARM pushes two registers and thus keeps the alignment. There is a link to a document on the stack alignment from ARM on the mentioned page.

As I just came across looking for a working IRQ handler for my bare metal application without a (Free)RTOS, I cannot check my assumption. But there are questions in this forum on unaligned stacks which indicate problems as discussed in the document from ARM.

BTW: Comparing the IRQ handlers from ARM and from FreeRTOS there seems to be room for some optimization in FreeRTOS IRQ handler.

HTH Rudi

rtel wrote on Tuesday, September 27, 2016:

Hi Rudi - thanks for your valuable feedback. This will be investigated
and corrected if necessary. It is possible that the number of registers
being pushed has changed over time, resulting in the issue you highlight.