__builtin_clz( ) can be replaced by what in the TASKING compiler?

Kernel
1

i am porting the SMP RTOS to the TC377 of infineon according to the SMP example of RP2040.
However, there is a big difference between the TC377 and the RP2040. The function __builtin_clz() is one of the GCC, but i use the Tasking compiler, i don’t know how to resovle the problem?

2

CLZ means ‘Count Leading Zeroes’… This is an assembler instruction e.g. on ARM.
You might check if your MCU/compiler also supports this or you’ve to replace it by a function emulating the behavior.
Are you trying to compile with configUSE_PORT_OPTIMISED_TASK_SELECTION enabled (where the CLZ operation is used on ARM) ?
You might retry having this config flag disabled in case this optimization is not applicable to your MCU.

3

@hs2 thank you for your reply, it is also failed after i enabled configUSE_PORT_OPTIMISED_TASK_SELECTION. The core TC377 is one of Tri-Core family of infineon, is different from ARM. Anyway, thank you for your suggestion! I will try other solutions.

4

What @hs2 wanted you to try probably was to try with configUSE_PORT_OPTIMISED_TASK_SELECTION disabled i.e. configUSE_PORT_OPTIMISED_TASK_SELECTION set to 0 is your FreeRTOSConfig.h.

Thanks.

5

Thank you for your help, it is same when i set the configUSE_PORT_OPTIMISED_TASK_SELECTION = 0 or configUSE_PORT_OPTIMISED_TASK_SELECTION = 1.

But it is seems successful when i redefine the __builtin_clz with C codes as below:

inline uint32_t __builtin_clz( UBaseType_t x )
{
int r = 0;
if (x < 1) return 0;
while (x >>= 1) r++;
return r;
}

6

Where is __builtin_clz called?

7

I am using the SMP kernel RTOS:
__builtin_clz( uxCoreMap ) is called by the function “static BaseType_t prvSelectHighestPriorityTask( const BaseType_t xCoreID )” in the tasks.c

8

This CLZ implementation doesn’t seem right :thinking: There are some implementations in the net.
However, is it possible that Tasking also supports CLZ as GCC does ?
I found a TASKING VX-toolset for TriCore User Guide
where a int __clz ( int ); intrinsic is documented. I’d use that instead if available.

9

Thank you. There is no SMP port based on the Tri-Core of infineon, and i found it is difficult to relize the SMP OS on the TC377.
Firstly, The general FreeRTOS has ported to the TC377 successfully ,just for one core of TC377.
Secondly, i was wondering how to make the three cores of TC377 runing using three respective OS(maybe this mode is called AMP?)

10

If you want to run a separate instance of FreeRTOS on each core, then you do not need SMP. And you are right that it is called AMP.

Thanks.

11

But i do not know how to get the AMP in the multi-core based on the current FreeRTOS project?

12

You create two separate single core projects, one for each core. Here is an example that demonstrates how the two cores can then pass events and information to each other - although the demo is not for the chip you are using. The main thing to consider is the boot sequence - you may want one core to boot first, with the other held in reset (by whatever means your chip allows), then have the first core release the second core from reset when it is ready. Alternative have both cores boot at the same time and somehow signal to each other when each is ready.

13

I am very appreciate for your help, i will check the example.