Build Issue ADC-SoC board CORTEX_A9_Cyclone_V_SoC_DK Demo

Hi Everybody,

I’m trying to setup FreeRTOS on the ADC-SoC board from Terasic which use the Cyclone V.
So I tried to use the Demo “CORTEX_A9_Cyclone_V_SoC_DK” but when I tried to build it I had a lot of errors. And for now I still have some. (I already worked on FreeRTOS with a STM32F446RE but I didn’t have to do the setup like here).
That’s why I’m asking your help today.

Download FreeRTOS Demo from FreeRTOS Website
Use “ARM DS IDE 2021.1” with a license
Toolchain = GCC 7.5.0 [arm-eabi]

Here I describe each steps followed in order to try to solve the problem:

  1. Import project from directory and Try to build 1 => Includes error

  2. add Includes path in the project properties, try to build 2 => Error: configTASK_NOTIFICATION_ARRAY_ENTRIES to be at least 3

  3. Set configTASK_NOTIFICATION_ARRAY_ENTRIES at 3, try to build 3 => Assembly Errors

  4. Put all informations (Project properties) -march, mcpu, … = armv7-a ; cortex-a9 ; vfpv3 ; softfp ; Try to build 4 => Error in alt_interrupt_armcc.s

  5. Exclude from build alt_interrupt_armcc.s ; Exclude fpga_support.c ; (I saw this step in a Topic on the forum)

  6. Error => Undefined ref vApplicationDaemonTaskStartupHook; Undefined ref __cs3_interrupt_vector


  8. I tried to add the linker file “cycloneV-dk-ram.ld” (Project Properties) => It appears two errors, one for a file named “” and one for librairies to use -lcs3 -lcs3unhosted -lcs3arm

  9. I found those files in the altera folder for quartus, I decided to copy them in order to put them where needed which solve the previous issue.

Then I had others errors which depend on the “cycloneV-dk-ram.ld” file:

/home/tcwg-buildslave/workspace/tcwg-make-release_0/snapshots/newlib.git~linaro-local~linaro-newlib-2_5_0/newlib/libc/sys/arm/crt0.S:273: undefined reference to initialise_monitor_handles' /home/tcwg-buildslave/workspace/tcwg-make-release_0/snapshots/newlib.git~linaro-local~linaro-newlib-2_5_0/newlib/libc/sys/arm/crt0.S:405: undefined reference to bss_start
/home/tcwg-buildslave/workspace/tcwg-make-release_0/snapshots/newlib.git~linaro-local~linaro-newlib-2_5_0/newlib/libc/sys/arm/crt0.S:405: undefined reference to __bss_end__' /home/tcwg-buildslave/workspace/tcwg-make-release_0/snapshots/newlib.git~linaro-local~linaro-newlib-2_5_0/newlib/libc/sys/arm/crt0.S:405: undefined reference to end

But I don’t know how to solve them, especially the first one

Does anybody have an idea to help me to solve this problem ? Or does anybody already manage to make this demo work ?
Tell me if you think I did a mistake in the steps above

Thanks a lot in advance for your help !

P.S.: I already searched on the forum topics which talk about FreeRTOS on Cyclone V, some topics helped me to solve some issues or to verify what I made, but i still have some issues.

Hi Mathieu, not sure if it helps but here is a FreeRTOS project that runs on a CORTEX A9 Cyclone-V board from Altera. It is a makefile project: run make from the directory that contains “” and “makefile”.

I used it to develop a FreeRTOS+TCP network interface for the Cyclone.
Note that the kernel and the +TCP libraries are quite old already and need to be updated from here and here.

Please note this comment in


# Example contents of :
# GCC_BIN=C:/intelFPGA_pro/17.0/embedded/host_tools/mentor/gnu/arm/baremetal/bin
# GCC_PREFIX=arm-altera-eabi

Hi, thank you for your answer !
I will try with the project you linked me.

For now I did the “” with the two following lines:

And I tried to do the make but I have an error about a missing include file (“FreeRTOS.h”).
I suppose the only one thing I can do is to specify the path for each.

Hi Mathieu, if you want, send an email to hein [at] htibosch [dot] net, and we will get through this more quickly. OK?

Hi Hein, I tried your GIT repo on a Terasic DE1 board and it works fine. Good work! :+1:

@mark1122 wrote:

I tried your GIT repo on a Terasic DE1 board and it works fine. Good work!

Thank you. I wrote the Cyclone +TCP driver for, who were so friendly to share it with the FreeRTOS community.

The Makefile assumes that the path leading to the project has no spaces. @MathieuS had problems compiling because of that.

I have downloaded your TCP demo and trying to run on Cortex A9 Cyclone-V board. I am getting link up and down events but not EMAC1 interrupt. Do i have to run this on core 1?. Which core (0,1)EMAC1 interrupt is tied to, or it does not matter.

Hey @bhavin1968,
I see that you were seeing the link up and down events but not the interrupt. I was wondering if you had tried running it on only a single core, as you had asked about, and if doing that yielded the outcome you were hoping for?