In my case, I have the classic example of task updating variables, that are used in a different task,
I know the variable update is “atomic” if the variable can be updated in one instruction. (8, 16 or 32 bit)
But in my system I do have 16 bit SDRAM interface, so updating a 32 bit variable, would require more then one instruction.
Or am I wrong about that??
I could, of course use the macros portENTER_CRITICAL and portEXIT_CRITICAL. I would like to avoid this because the variables are written and read often.
When doing the the write and read operation on them I could also disable interrupts. But is that allowed by FreeRTOS? Wouldn’t that make the scheduler run unexpected?