at91sam7s256 AT91C_ID_SYS

aviasaf wrote on Monday, April 06, 2009:

hello all,

I am trying to activate the DBGU uart peripheral, but its related to the AT91C_ID_SYS which is also
connected to the periodic timer.

the free rtos  scheduler is triggered by the the periodic timer and therefore vPortPreemptiveTick is running every time AT91C_ID_SYS occurs.

I would like to add my interrupt procedure of the DBGU uart without changing the real time of the free rtos scheduler.

does any one deal with this issue before?

avi

davedoors wrote on Monday, April 06, 2009:

Search the forum for this, there were some solutions given way back.

jon_newcomb wrote on Monday, April 06, 2009:

I found a link to the answer you are looking for, but I sympathise how difficult it is to find information here.
The search does not allow you to view a thread as a whole… like this…
https://sourceforge.net/forum/forum.php?thread_id=1351935&forum_id=382005
(This link required a bit of detective work!)

Instead, search only returns individual messages like this…
https://sourceforge.net/forum/message.php?msg_id=4443717

Anyhow, it explains how I modified some files to get the desired result…
Good luck.

jon_newcomb wrote on Monday, April 06, 2009:

And to answer your question specifically, I can’t see a way to add DBGU support without modifying some of the FreeRTOS files.

The information in the linked post tells you the required changes. You also need to setup the DBGU hardware and write the body of the UartDbguIsr()

Look at how uart0 & uart1 are setup and handled, it’s mostly a copy of what is done here with a few bits chopped out.

aturowski wrote on Monday, April 06, 2009:

You don’t have to modify FreeRTOS kernel. You can do this like that:

void vSysIsr(void) __attribute__ ((naked));
void vSysIsr(void)
{
  asm(
    "push   {r0}"               "\n\t"                 
/* AT91C_PITC_PISR register address to r0 */           
    "ldr    r0,=0xFFFFFD34"     "\n\t"                 
    "ldr    r0,[r0]"            "\n\t"                 
/* now content of AT91C_PITC_PISR register is in r0 */ 
    "tst    r0,#1"              "\n\t"                 
/* test bit PITS in the register */                    
    "pop    {r0}"               "\n\t"                 
/* jump to vPreemptiveTick if it is PIT interrupt */   
    "bne    vPreemptiveTick"    "\n\t"                 
/* if it is not PIT irq, check the rest of sources */  
    "b      vSysIsrRest"        "\n\t"                 
  );
}

//------------------------------------------------------------------------------
/// This procedure services all system interrupt sources
/// except PIT interrupt
//------------------------------------------------------------------------------
void vSysIsrRest(void) __attribute__ ((interrupt ("IRQ")));
void vSysIsrRest(void)
{
// check if interrupt is caused by end of PDC transfer DBGU
  if ((AT91C_BASE_DBGU->DBGU_CSR & AT91C_US_ENDTX) != 0)
  {
    vDbguIsr();
  }

}

jon_newcomb wrote on Tuesday, April 07, 2009:

Opps, forgot to mention the linked example was for the IAR port.

aviasaf wrote on Tuesday, April 07, 2009:

hello all

thanks a lot

it was very helpful

avi