A few things to check – interrupt priority assignments and preemption priority bits as noted here RTOS for ARM Cortex-M. Also good to double check the FAQ here FreeRTOS - Open Source RTOS Kernel for small embedded systems. Also if you can upgrade to v10 there are many more programmatic checks that might quickly identify a configuration issue. The upgrade is generally easy due to the importance FreeRTOS places on backward compatibility.
By “traffic” do you mean “glitch”? Your statement implies the UART traffic lasts only 130us, so I’m wondering if it’s a glitch or perhaps you are using very high baud rates.
By “communications” do you mean “glitch”? Is there a glitch on UART startup that causes an immediate hardfault, or is there a glitch, some proper UART communication, and then a hardfault?
Can you post your UART ISR to help us see your design a little more clearly?