systemview's timestamp is abnormal when enabling tickless mode

Kernel
1

hoya wrote on Monday, December 04, 2017:

Dear All:
I aneble the tickless onto M0+ and the idle interrupt can change from 1ms to 100ms captured by LA.
But the timestamp of my message to systemview is abnormal.(too long) Need to fine tune the pareamter SYSVIEW_TIMESTAMP_FREQ and SYSVIEW_CPU_FREQ.(better) but still can’t get correct timestamp compared with LA.

BR,
-Hoya

2

rtel wrote on Monday, December 04, 2017:

Systemview? Are you talking about the Segger tool? If so, I’m afraid
I’m not familiar enough with it so suggest you ask Segger for support.