# System restarts

**URL:** <https://forums.freertos.org/t/system-restarts/362>\
**Category:** Kernel\
**Created:** [April 23, 2007, 1:29pm UTC](https://forums.freertos.org/t/system-restarts/362 "2007-04-23T13:29:59Z")\
**Posts on this page:** 3\
**Page:** 1

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**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\
**Post date:** [April 23, 2007, 1:29pm UTC](https://forums.freertos.org/t/system-restarts/362/1 "2007-04-23T13:29:59Z")

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**[saiberion](https://sourceforge.net/u/saiberion/)** wrote on [Monday, April 23, 2007](https://sourceforge.net/p/freertos/discussion/382005/thread/0fad5141/#1cd2):

Hi,

I have a problem with the AT91SAM7S Controller using the SPI over DMA.  
I already had the application working (no interrupts, no dma) and now I’d like to use the DMA for better performance.  
DMA transfer for itself works but after the transfer and it’s output to my serial debug port FreeRTOS starts again from the beginning in main().

Here some code snippets:  
command for initiating a DMA transfer:

void spiDMA\_sendandreceive(portCHAR cs, portCHAR \*datatosend, portCHAR sizeofsend, portCHAR\* datatoreceive, portCHAR sizeofreceive)  
{  
\_\_\_portCHAR rectmp;  
\_\_\_// Use given Chipselect for transfer  
\_\_\_spi\_select\_cs(cs);  
&nbsp;&nbsp;&nbsp;  
\_\_\_// Initialize the Transmit and Receive Pointer  
\_\_\_AT91C\_BASE\_SPI-\>SPI\_RPR = (unsigned int)datatoreceive;  
\_\_\_AT91C\_BASE\_SPI-\>SPI\_TPR = (unsigned int)datatosend;

\_\_\_// Intialize the Transmit and Receive Counters  
\_\_\_AT91C\_BASE\_SPI-\>SPI\_RCR = sizeofreceive;  
\_\_\_AT91C\_BASE\_SPI-\>SPI\_TCR = sizeofsend;  
&nbsp;&nbsp;  
\_\_\_// Enable Interrupts just for DMA transfer; The most of the application still uses the existing SPI commands&nbsp;&nbsp;&nbsp;  
\_\_\_AT91F\_SPI\_EnableIt(AT91C\_BASE\_SPI, AT91C\_SPI\_ENDRX);  
\_\_\_AT91C\_BASE\_SPI-\>SPI\_PTCR = AT91C\_PDC\_TXTEN + AT91C\_PDC\_RXTEN;  
\_\_\_// Wait for receive to be finished  
\_\_\_xQueueReceive(xQueueSPIRec,&rectmp,portMAX\_DELAY);  
\_\_\_AT91C\_BASE\_SPI-\>SPI\_PTCR = AT91C\_PDC\_TXTDIS + AT91C\_PDC\_RXTDIS;  
\_\_\_AT91F\_SPI\_DisableIt(AT91C\_BASE\_SPI, AT91C\_SPI\_ENDRX);  
}

The ISR: (xQueueSPIRec from above and xSPIRecQueue from below are identical; queue passing as in EMAC example in uIP demo)  
void SPIISR(void)  
{  
\_\_\_portENTER\_SWITCHING\_ISR();  
\_\_\_portBASE\_TYPE&nbsp;&nbsp;&nbsp; xTaskPreviouslyWoken;  
\_\_\_portCHAR cRec;  
\_\_\_cRec = 0xb5;  
&nbsp;&nbsp;&nbsp;  
\_\_\_xTaskPreviouslyWoken = pdFALSE;  
&nbsp;&nbsp;&nbsp;  
\_\_\_xTaskPreviouslyWoken = xQueueSendFromISR(xSPIRecQueue,&cRec,xTaskPreviouslyWoken );

\_\_\_AT91C\_BASE\_AIC-\>AIC\_EOICR = 0;  
\_\_\_portEXIT\_SWITCHING\_ISR(pdFALSE);  
}

call of DMA:  
[…]  
portSHORT sRec;  
spiDMA\_sendandreceive(7,0,8,(portCHAR\*)&sRec,8);  
[…]

The SPI has following configuration:  
Master Mode, Fixed Peripheral, chip select generation with decoder;  
(each chip select register) CPOL = 0, NCPHA = 1, CSAAT = 0, 8-Bit transfers, SCK ~ 2MHz

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<div class="post-metadata">

**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\
**Post date:** [April 23, 2007, 3:30pm UTC](https://forums.freertos.org/t/system-restarts/362/2 "2007-04-23T15:30:58Z")

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**[embeddedc](https://sourceforge.net/u/embeddedc/)** wrote on [Monday, April 23, 2007](https://sourceforge.net/p/freertos/discussion/382005/thread/0fad5141/#1cd2/f62e):

I was going to suggest that you look at the EMAC example as this uses the DMA, but reading your post again it seems you are already doing this.

As you are always passing pdFALSE to portEXIT\_SWITCHING\_ISR() then you need not bother with the portENTER\_SWITCHING\_ISR/portEXIT\_SWITCHING\_ISR() macros and could instead just use the \_\_IRQ attribute (assuming GCC).&nbsp; This would save you a bit of stack in case it is a stack issue that is causing the problem.

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<div class="post-metadata">

**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\
**Post date:** [April 24, 2007, 7:12am UTC](https://forums.freertos.org/t/system-restarts/362/3 "2007-04-24T07:12:50Z")

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**[saiberion](https://sourceforge.net/u/saiberion/)** wrote on [Tuesday, April 24, 2007](https://sourceforge.net/p/freertos/discussion/382005/thread/0fad5141/#1cd2/f62e/c5b5):

I again reviewed the EMAC code and the documentation. The Emac works with DMA but for the SPI I intend to use the PDC as DMA controller (EMAC doesn’t have PDC controls).

But somehow, like magic, my given code above today works perfectly Oo. At first I thought it was because enabling/disabling the PDC was the cause because after splitting this up in 2 calls it already worked.  
Today back stepping my changes to find the erroneous part. But I ended with my code example I gave. Weird thing 😉