Should the Microblaze FreeRTOS port define portMEMORY_BARRIER()?

Just to be clear the memory barrier was already in the code so I am not adding that. I am just defining the memory barrier. I assume this means its also a problem for other platforms/compilers.

Fair enough, that’s what I thought. I do wonder if it is a bug though. The compiler would have to somehow know that xPendingReadyList and xPendingReadyList->xListEnd->pxNext->pvOwner->xEventListItem->pxContainer could be related (in this case they are the same object). I wonder what assumptions the compiler can make about memory. If it couldn’t make any then it would never be able cache values in registers. I wonder if the pvOwner (which is a void *) lets the compiler relax some of its assumptions. Anyways, like you mention I’ll try post to the compler’s support group.