RISC-V interrupts disabled during active task

Thanks for the response. Here is the link RISC-V - Interrupts not enabled in xPortStartFirstTask. It’s from two years ago and I think it might be related but I wasn’t completely sure that’s why I didn’t just comment my question there.

I haven’t found any other mention of interrupts being disabled during a tasks so I’m wondering if there is some FreeRTOS task setup I’m missing.

I have tried forcing the pxPortInitialiseStack to store 0x1888 (I’m assuming this is the tasks interrupt enable state) instead of 0x1880 but when it gets back to the processed_source: the pxCurrentTCB has a different mstatus as the one I forced during port init.

I’m sure there is a large chunk of the process I am misunderstanding, but interrupts should always be enabled outside of critical sections?