Relacatable vector, error address MTUX

ofont wrote on Thursday, October 06, 2011:

Hi.
I’m using FreeRtos with GNURX (RX62N) in HEW.
In hardware manual i see that after S12AD interrupt, exist various address reserved ( from 0x019C to 0x01C4).  When i see your code in RelocatableVectors in vects.c  show this:

//;0x0194  AD3_ADI3
    (fp)INT_Excep_AD3_ADI3,
//;0x0198  Reserved
    (fp)0,
//;0x019C  Reserved
    (fp)0,
//;0x01A0  TPU0_TGI0A
   (fp)INT_Excep_TPU0_TGI0A,
//;0x01A4  TPU0_TGI0B
    (fp)INT_Excep_TPU0_TGI0B,

this means that TGIOA interrut is in adress 0x01A0?? this adress should be reserved according to hardware manual because this interrupt should be in 0x01C8.

Thanks for all.
Regards

rtel wrote on Thursday, October 06, 2011:

When i see your code in RelocatableVectors in vects.c  show this:

It is not my code.  If you look at the top of the file you will see:

/***********************************************************************/
/*                                                                     */
/*  FILE        :vects.c                                               */
/*  DATE        :Wed, Aug 25, 2010                                     */
/*  DESCRIPTION :Vector Table                                          */
/*  CPU TYPE    :Other                                                 */
/*                                                                     */
/*  This file is generated by KPIT GNU Project Generator.              */
/*                                                                     */
/***********************************************************************/

Looking at the file, I see something completely different, as shown below:

const fp HardwareVectors[] FVECT_SECT  = {
//;0xffffff80  Reserved
    (fp)0,
//;0xffffff84  Reserved
    (fp)0,
//;0xffffff88  Reserved
    (fp)0,
//;0xffffff8C  Reserved
    (fp)0,
//;0xffffff90  Reserved
    (fp)0,
//;0xffffff94  Reserved
    (fp)0,
//;0xffffff98  Reserved
    (fp)0,
//;0xffffff9C  Reserved
    (fp)0,
//;0xffffffA0  Reserved
    (fp)0,
//;0xffffffA4  Reserved
    (fp)0,
//;0xffffffA8  Reserved

Etc.

However, if there is a problem with the code you should submit a bug with KPIT.

Regards.

ofont wrote on Thursday, October 06, 2011:

Hi. Thanks for your reply.

The problem is not here. the problem is that from vector adress 0x019C to 0x01C4 should be reserved because in hardware manual is reserved. In this code generate with KPIT GNU generator this adrees are filled with other interrupts that no correspond with this vector adress.

In good code should be:

//;0x019C  Reserved
    (fp)0,										
//;0x01A0  Reserved
	(fp)0,
//;0x01A4  Reserved
    (fp)0,	
//;0x01A8  Reserved
    (fp)0,
//;0x01AC  Reserved
    (fp)0,
//;0x01B0  Reserved
    (fp)0,	
//;0x01B4  Reserved
    (fp)0,						
//;0x01B8  Reserved
    (fp)0,
//;0x01BC  Reserved
	(fp)0,	
//;0x01C0  Reserved
    (fp)0,
//;0x01C4  Reserved
    (fp)0,
//;0x01C8  MTU0_TGIA0
	(fp)INT_Excep_MTU0_TGIA0,

but in the code with KPIT gnu generator is:

//;0x019C  Reserved
    (fp)0,
//;0x01A0  TPU0_TGI0A
	(fp)INT_Excep_TPU0_TGI0A,
//;0x01A4  TPU0_TGI0B
    (fp)INT_Excep_TPU0_TGI0B,
//;0x01A8  TPU0_TGI0C
    (fp)INT_Excep_TPU0_TGI0C,
//;0x01AC  TPU0_TGI0D
    (fp)INT_Excep_TPU0_TGI0D,
//;0x01B0  TPU0_TCI0V
    (fp)INT_Excep_TPU0_TCI0V,
//;0x01B4  Reserved
    (fp)0,
//;0x01B8  Reserved
    (fp)0,
//;0x01BC  TPU1_TGI1A
	(fp)INT_Excep_TPU1_TGI1A,
//;0x01C0  TPU1_TGI1B
    (fp)INT_Excep_TPU1_TGI1B,
//;0x01C4  Reserved
    (fp)0,

thanks