# \[PSoC 5\] \[LCD 128x64\] My Application Program is Running fine with CY8CKIT-050 but in my Hardware it hangs on CY\_ISR(IntDefaultHandler) in file name "Cm3Start.c"

**URL:** <https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462>\
**Category:** Kernel\
**Created:** [September 26, 2015, 10:11am UTC](https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462 "2015-09-26T10:11:09Z")\
**Posts on this page:** 20\
**Page:** 1

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**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\
**Post date:** [September 26, 2015, 10:11am UTC](https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462/1 "2015-09-26T10:11:09Z")

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**[dhruvacharya](https://sourceforge.net/u/dhruvacharya/)** wrote on [Saturday, September 26, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/17f86b2a/#4f4f):

Hi there,

[FreeRTOS V8.2.1] [PSoC Creator] [PSoC 5] [CY8C5868AXI-LP035] [GCC ARM CM3 port]

I am facing weird problem with my Application on PSoC 5 based hardware. This application is based on FreeRTOS, and application contains 128×64 kind of monochromatic LCD (Graphical LCD), having controller like ks0107.

Please find my Project here (As I am new to this forum I don’t know how to attach my project files so attaching zip file for PSoC Creator 3.2 workspace).

1. Application program for CY8CKIT-050 [here](https://drive.google.com/open?id=0B9VyuD_nTrnsSmhKTEZtcXRDTmc).
2. Application program for our Hardware [here](https://drive.google.com/open?id=0B9VyuD_nTrnsUzhueFhuazJFblE) (Only with different PIN usage)

The problem is that if we run this program with the PIN used for CY8CKIT-050 and program it in CY8CKIT-050, it runs smoothly and complete every task as desired with no problem at all. But if we only change the MCU PINs as used in our Hardware and program the Hardware MCU with same program, application runs to certain point and then hang. We tried debug mode and found out that after running for some time application goes to this point :

```auto
CY_ISR(IntDefaultHandler)
{

    while(1)
    {
        / ***********************************************************************
        * We must not get here. If we do, a serious problem occurs, so go
        * into an infinite loop.
        *********************************************************************** /
    }
}

```

which is in Cm3Start.c. And at this point application stays in hanged state.

Here please note that this only happens if we used the same program in our Hardware. But if we use it in Kit (CY8CKIT-050), it runs completely fine without any fault.

We would like to also share that we have used FreeRTOS prior to this application, and we have successfully built applications with FreeRTOS.

Will you please check this files and see if we have made any mistake anywhere?

---

<div class="post-metadata">

**Author:** ![rtel](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/rtel/32/31_2.png) [@rtel](https://forums.freertos.org/u/rtel)\
**Post date:** [September 26, 2015, 1:02pm UTC](https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462/2 "2015-09-26T13:02:59Z")

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**[rtel](https://sourceforge.net/u/rtel/)** wrote on [Saturday, September 26, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/17f86b2a/#a199):

I would guess that the funciton you are ending up in is a default interrupt handler - that is - an interrupt handler that is assigned to every interrupt in the system when the system starts up. Any interrupts used by the application should replace the default with the application specific handler. Therefore it would seem simply that you are using an interrupt for which you have not installed a handler - perhaps because your own hardware is using different pins to the hardware for which the demo was written.

---

<div class="post-metadata">

**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\
**Post date:** [September 26, 2015, 1:59pm UTC](https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462/3 "2015-09-26T13:59:51Z")

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**[dhruvacharya](https://sourceforge.net/u/dhruvacharya/)** wrote on [Saturday, September 26, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/17f86b2a/#ff0a):

Hi,

In my above application I only use one Interrupt which is DMA cycle completion interrupt. That is not PIN Specific Interrupt, and for that I have also defined Handler following the method suggested in demo. appart from that no interrupt is used which can be PIN specific. Whatever PIN location changes in the transation are only GPIOs. In PSoC we usally can switch any PIN (mostly Digital GPIO) to any PIN. Any PIN used here is not configured for external hardware interrupt. I also may attach some snapshot of the call stack window in debug mode. If it may help to find out the problem.

---

<div class="post-metadata">

**Author:** ![rtel](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/rtel/32/31_2.png) [@rtel](https://forums.freertos.org/u/rtel)\
**Post date:** [September 27, 2015, 10:04am UTC](https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462/4 "2015-09-27T10:04:14Z")

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**[rtel](https://sourceforge.net/u/rtel/)** wrote on [Sunday, September 27, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/17f86b2a/#ff0a/ad33):

Have you installed the interrupt handlers required by FreeRTOS - which  
are PendSV, SysTick and SVCCall?

See the “Special note to ARM Cortex-M” section of the section “1” in the  
FAQ question “[The  
application I created compiles, but does not run](http://www.freertos.org/FAQHelp.html)”.

Regards.

---

<div class="post-metadata">

**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\
**Post date:** [September 27, 2015, 3:22pm UTC](https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462/5 "2015-09-27T15:22:49Z")

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**[dhruvacharya](https://sourceforge.net/u/dhruvacharya/)** wrote on [Sunday, September 27, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/17f86b2a/#ff0a/ad33/03e3):

[FreeRTOS FAQ page](http://www.freertos.org/FAQHelp.html) you suggested was of the great help for every problem prior to this , but this time it doesnt helped me. I have gone through it once again after your suggestion. I am attaching various function screenshot if you can find any faults.

PS. This conversation is going on in parallel:  
[http://www.cypress.com/forum/psoc-5-known-problems-and-solutions/freertos-lcd-128x64-my-application-program-running-fine](http://www.cypress.com/forum/psoc-5-known-problems-and-solutions/freertos-lcd-128x64-my-application-program-running-fine)

---

<div class="post-metadata">

**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\
**Post date:** [September 27, 2015, 3:35pm UTC](https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462/6 "2015-09-27T15:35:31Z")

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**[dhruvacharya](https://sourceforge.net/u/dhruvacharya/)** wrote on [Sunday, September 27, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/17f86b2a/#da72):

Hi I have posted this comment before but I dont know why it couldn’t appeare here:

The [[FreeRTOS FAQ page](http://www.freertos.org/FAQHelp.html)] you suggested was great help for all the problems prior to this one, I have gone through it may times and once again I have gone through that after your suggestion. I am attaching some screenshot here for if you could find if I have made any problem in Interrupt Handlers.

PS : This conversation is going on in parallel:  
[http://www.cypress.com/forum/psoc-5-known-problems-and-solutions/freertos-lcd-128x64-my-application-program-running-fine](http://www.cypress.com/forum/psoc-5-known-problems-and-solutions/freertos-lcd-128x64-my-application-program-running-fine)

I will update solution to both the thread, if this problem get solved from either. Thanks for the help.

---

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**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\
**Post date:** [September 29, 2015, 7:26am UTC](https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462/7 "2015-09-29T07:26:07Z")

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**[dhruvacharya](https://sourceforge.net/u/dhruvacharya/)** wrote on [Tuesday, September 29, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/17f86b2a/#f802):

Moderator please moderate my comments so others and the experts can see the message.

---

<div class="post-metadata">

**Author:** ![htibosch](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/htibosch/32/62_2.png) [@htibosch](https://forums.freertos.org/u/htibosch)\
**Post date:** [September 29, 2015, 2:47pm UTC](https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462/8 "2015-09-29T14:47:51Z")

</div>

**[heinbali01](https://sourceforge.net/u/heinbali01/)** wrote on [Tuesday, September 29, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/17f86b2a/#8880):

Recently I also saw an unknown interrupt un some project, caught by a DefaultHandler.

What I did was to catch every undefined interrupt in a separate handler (it took some copy/pasting). Each handler would just exist of an infinite loop `for( ;;)`

In my case it turned out that I missed 2 essential defines in my ‘FreeRTOSConfig.h’ :

```auto
  #define vPortSVCHandler SVC_Handler
  #define xPortPendSVHandler	PendSV_Handler

```

In fact, `vPortSVCHandler()` and `xPortPendSVHandler()` were both defined in `portable/GCC/ARM_CM4F/port.c`, but depending on the platform and compilers, these function names get different actual names.

Like Richard already suggested, I would check especially the implementation of PendSV, SysTick and SVCCall.

And remember: cross-posting is not really appreciated. Please keep anyone updated.

Regards.

---

<div class="post-metadata">

**Author:** ![rtel](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/rtel/32/31_2.png) [@rtel](https://forums.freertos.org/u/rtel)\
**Post date:** [September 29, 2015, 3:33pm UTC](https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462/9 "2015-09-29T15:33:42Z")

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**[rtel](https://sourceforge.net/u/rtel/)** wrote on [Tuesday, September 29, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/17f86b2a/#8880/61f0):

I think on the Cortex-M the number of the currently executing interrupt  
can be read directly from one of the NVIC registers, but I can’t  
remember which one.

---

<div class="post-metadata">

**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\
**Post date:** [September 30, 2015, 5:44am UTC](https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462/10 "2015-09-30T05:44:40Z")

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**[dhruvacharya](https://sourceforge.net/u/dhruvacharya/)** wrote on [Wednesday, September 30, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/17f86b2a/#5423):

@Hein

> And remember: cross-posting is not really appreciated. Please keep anyone updated.

Sorry for my mistake. I will avoid it next time. But time is running so fast and nowadays if developer is not able to provide solutions, it hurt really badly in our part of world. But in any case I will keep your point in my mind. Thanks for that.

I actully don’t get your point Hein, sorry for my slow learning capability, when you say:

> In my case it turned out that I missed 2 essential defines in my ‘FreeRTOSConfig.h’ :  
> Like Richard already suggested, I would check especially the implementation of PendSV, SysTick and SVCCall.

Are you trying to say that I need to create this functions by my own instead of using the one presented at \*\FreeRTOS\Source\portable\GCC\ARMCM3\port.c \* ?

If you are not trying to say that, than are you trying to say that I need to check if this function gets called properly or not? If yes than how may I check that?

I actually first call this **vInitCortexHandle** above all the task creation and scheduler starting.

```auto
void vInitCortexHandle ( void )
{
	/* Initialize the OS vectors - make it ready to create the task, below */
    
    /* Handler for Cortex Supervisor Call (SVC, formerly SWI) - address 11 */
    CyIntSetSysVector( CORTEX_INTERRUPT_BASE + SVCall_IRQn,
        (cyisraddress)vPortSVCHandler );
    
    /* Handler for Cortex PendSV Call - address 14 */
	CyIntSetSysVector( CORTEX_INTERRUPT_BASE + PendSV_IRQn,
        (cyisraddress)xPortPendSVHandler );    
    
    /* Handler for Cortex SYSTICK - address 15 */
	CyIntSetSysVector( CORTEX_INTERRUPT_BASE + SysTick_IRQn,
        (cyisraddress)xPortSysTickHandler );
}

```

and prior to that I define this

```auto
/* Declarations of the exception handlers for FreeRTOS */
extern void xPortPendSVHandler(void);
extern void xPortSysTickHandler(void);
extern void vPortSVCHandler(void);

```

Will you please help me by clarifying these two queries and provide me some example. Thank you.

@rtel

> I think on the Cortex-M the number of the currently executing interrupt  
> can be read directly from one of the NVIC registers, but I can’t  
> remember which one.

Are you trying to say that we can find which interrupt cause the **execution of default handler**? Please elaborate on this; I think we can find the reason for the problem with this direction.  
But as we have never came across the problem like this one, we have never bother about NVIC registers and all that, so will you please guide me through this? Meanwhile I am also digging this as much on online references. Thanks for the help.

---

<div class="post-metadata">

**Author:** ![htibosch](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/htibosch/32/62_2.png) [@htibosch](https://forums.freertos.org/u/htibosch)\
**Post date:** [September 30, 2015, 6:13am UTC](https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462/11 "2015-09-30T06:13:14Z")

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**[heinbali01](https://sourceforge.net/u/heinbali01/)** wrote on [Wednesday, September 30, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/17f86b2a/#44ca):

Hi Dhruv,

> Are you trying to say that I need to create this functions by my  
> own instead of using the one presented at ARMCM3/port.c ?

No they’re OK and they should be used.

What happened in my M4 port was the following: `port.c` defines two functions `vPortSVCHandler()` and `xPortPendSVHandler()`. These are the ISR’s for resp. `SVC_Handler` and `PendSV_Handler`.

The actual names `SVC_Handler` and `PendSV_Handler` may vary between platforms and compilers. For that reason, these two defines are used:

```auto
    #define vPortSVCHandler SVC_Handler
    #define xPortPendSVHandler PendSV_Handler

```

> Are you trying to say that we can find which interrupt cause  
> the execution of default handler?

Have a look at the IABR register(s) ( google “cortex m3 IABR” ) when it runs into the DefaulHandler again, it indicates which interrupts are active.  
I’m very curious which interrupt is triggered and not yet defined.

Regards.

---

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**Author:** ![rtel](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/rtel/32/31_2.png) [@rtel](https://forums.freertos.org/u/rtel)\
**Post date:** [September 30, 2015, 8:07am UTC](https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462/12 "2015-09-30T08:07:12Z")

</div>

**[rtel](https://sourceforge.net/u/rtel/)** wrote on [Wednesday, September 30, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/17f86b2a/#5423/fd90):

> @rtel
> 
> ```
> I think on the Cortex-M the number of the currently executing interrupt
> can be read directly from one of the NVIC registers, but I can't
> remember which one.
> 
> ```
> 
> Are you trying to say that we can find which interrupt cause the  
> _execution of default handler_? Please elaborate on this, I think we can  
> find the resone problem with this direction.  
> But as we have never came acrros the problem like this one, we have  
> never bothor about NVIC registers and all that, so will you please guide  
> me through this? Meanwhile I am also digging this as much on online  
> referances. Thanks for the help.

The information you need is in the ARM Cortex-M technical documentation,  
I could look it up for you, or you could look it up yourself ;o)

---

<div class="post-metadata">

**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\
**Post date:** [September 30, 2015, 8:57am UTC](https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462/13 "2015-09-30T08:57:46Z")

</div>

**[dhruvacharya](https://sourceforge.net/u/dhruvacharya/)** wrote on [Wednesday, September 30, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/17f86b2a/#a276):

Hi Hein,  
I just copied and pasted this into FreeRTOSConfig.h

```auto
#define vPortSVCHandler SVC_Handler
#define xPortPendSVHandler PendSV_Handler

```

Yet the same problem.

I am studying about IABR and NVIC registers to look forward for the solution. I will update soon.

---

<div class="post-metadata">

**Author:** ![htibosch](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/htibosch/32/62_2.png) [@htibosch](https://forums.freertos.org/u/htibosch)\
**Post date:** [October 1, 2015, 1:25am UTC](https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462/14 "2015-10-01T01:25:43Z")

</div>

**[heinbali01](https://sourceforge.net/u/heinbali01/)** wrote on [Thursday, October 01, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/17f86b2a/#c130):

Hi Dhruv,

Patience can solve any problem 🙂

I made some adaptations to a source file in your repository:

```
Display.cydsn/Generated_Source/PSoC5/Cm3Start.c
Display.cydsn/codegentemp/Cm3Start.c

```

( I don’t know which version must be adapted, the sources were equal )

Please find the attachment to this post: Cm3Start.zip

**Explanation** :

if I’m not mistaken, your PSoC5 has at most 48 interrupt sources.

```auto
    #define CY_INT_IRQ_BASE (16u)
    #define CYINT_IRQ_BASE (CY_INT_IRQ_BASE)
    #define CY_NUM_INTERRUPTS (32u)
    #define CY_NUM_VECTORS (CYINT_IRQ_BASE + CY_NUM_INTERRUPTS)

```

I declared 48 separate handlers, each one will call `vUnknownInterruptHandler()` with a numeric parameter:

```auto
    static volatile int iInterruptNumber = -1;

    void vUnknownInterruptHandler( int iNumber )
    {
        iInterruptNumber = iNumber;
        while( 1 )
        {
            /* Stop here to inspect 'iInterruptNumber' in a debugger.
            Put a break here. */
            CY_NOP;
        }
    }

    CY_ISR( vHandler_0 ) { vUnknownInterruptHandler( 0 ); }
    CY_ISR( vHandler_1 ) { vUnknownInterruptHandler( 1 ); }
    ...

```

By default, the above handlers will be used:

```auto
    /* This source line will be temporarily replaced: */
    - CyRamVectors[i] = (i < CY_NUM_ROM_VECTORS) ? RomVectors[i] : &IntDefaultHandler;
    + CyRamVectors[i] = (i < CY_NUM_ROM_VECTORS) ? RomVectors[i] : pxGetIntvector( i );

```

Do you understand the idea behind it?  
Could you try this out?

Regards.

---

<div class="post-metadata">

**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\
**Post date:** [October 1, 2015, 12:32pm UTC](https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462/15 "2015-10-01T12:32:03Z")

</div>

**[dhruvacharya](https://sourceforge.net/u/dhruvacharya/)** wrote on [Thursday, October 01, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/17f86b2a/#2a99):

@rtel and @Hein,

Thanks for the help. I am determined to solve this problem.

I have gone through Architecture Technical Reference Manual and Register TRM for PSoC 5.

I have found that PSoC 5 generally support 32 external interrupt lines (+ 15 exceptions) and for each Ext Interrupt line it represents a bit position in following register.

1. **NVIC\_SETENA0** : Interrupt Enable Set 0-31 : **Address = 0xe000e100**
2. **NVIC\_CLRENA0** : Interrupt Enable Clear 0-31 : **Address = 0xe000e180**
3. **NVIC\_SETPEND0** : Interrupt Pending Set 0-31 : **Address = 0xe000e200**
4. **NVIC\_CLRPEND0** : Interrupt Pending Clear 0-31 : **Address = 0xe000e280**

Each one is four byte long.

In normal condition: Bit 0 is for my DMA interrupt, which executes accordingly fine and working when problem yet to come. But when the faulty loop stops the execution of the application values which are contained in the respected register is suspicious. I have attached a screenshot for that.

In that you may see that **NVIC\_SETPEND0** and **NVIC\_CLRPEND0** contain 0x40000000.

This means that External Interrupt number 30 caused the execution of the default interrupt handler, as I am not using this external Interrupt line in my application and I have not declared handler for that.

Now one important line I have encountered in Architecture TRM that says:

_The pending register can also be written by software. When the software writes a 1 to the pending bit, it activates the interrupt._

**I don’t know how this bit is set… but please keep reading.**

Till now I have not used the suggestion given by @Hein.

As you have suggested the changes, @Hein,

It can’t be made in Cm3Start.c, as every time I build the application It changes to the default version. So In general I have called this changes hard way in the main function before doing anything else:

```auto
#ifndef CYINT_IRQ_BASE
#define CYINT_IRQ_BASE 16
#endif /* CYINT_IRQ_BASE */

#define CY_NUM_INTERRUPTS (32u)
#define CY_NUM_VECTORS (CYINT_IRQ_BASE + CY_NUM_INTERRUPTS)

extern cyisraddress CyRamVectors[CY_NUM_VECTORS];

int main()
{
	uint32 i;
	
	for (i = 2u; i < CY_NUM_VECTORS; i++)
    {
        CyRamVectors[i] = pxGetIntvector( i ); 
    }

....
....

}

```

I have avoided using first two location of this vector table because:

1. **Initial Stack Pointer**
2. **Reset**

Now executing with this extra debug, I have found out that every time **vHandler\_3** is called, which is location for **Hard Fault** (Number 3 of the 15 exceptions supported by the PSoC 5 according to Architecture TRM). See attached picture. And what Manual has to say about this exeption:

\*The hard fault handler can be caused by:

1. Usage faults, bus faults, and memory management faults if their handler cannot be executed.
2. Bus faults during vector fetch (reading of a vector table during exception handling).\*

_Now The reason for a particular fault is updated in the corresponding status register (for example, BFSR register for bus fault, MFSR for memory management fault, UFSR for Usage Fault, HFSR for Hard Fault)._

I am digging more and more to this I will update you soon. Meanwhile if you have other **IDEA** please share.

Thank you again, To be continued…

---

<div class="post-metadata">

**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\
**Post date:** [October 1, 2015, 3:10pm UTC](https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462/16 "2015-10-01T15:10:42Z")

</div>

**[dhruvacharya](https://sourceforge.net/u/dhruvacharya/)** wrote on [Thursday, October 01, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/17f86b2a/#acf3):

Finally found the cause of the problem.

**NVIC\_HARD\_FAULT\_STATUS** : Hard Fault Status Register : **Address = 0xe000ed2c**

This register has value 0x40000000, which means:

_Hard Fault activated because a Configurable Fault was received and cannot activate because of priority or because the Configurable Fault is disabled. The Hard Fault handler then has to read the other fault status registers to determine cause._

**NVIC\_USAGE\_FAULT\_STATUS** : Usage Fault Status Register : **Address = 0xe000ed2a**

This register has value 0x0001, which means:

**UNDEFINSTR** : _The UNDEFINSTR flag is set when the processor attempts to execute an undefined instruction. This is an instruction that the processor cannot decode. The return PC points to the undefined instruction._

Now what this means? I cannot find the details about why this is happened and how to resolve. Please help me here.

---

<div class="post-metadata">

**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\
**Post date:** [October 1, 2015, 3:33pm UTC](https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462/17 "2015-10-01T15:33:11Z")

</div>

**[davedoors](https://sourceforge.net/u/davedoors/)** wrote on [Thursday, October 01, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/17f86b2a/#9773):

Does this help? [http://www.freertos.org/Debugging-Hard-Faults-On-Cortex-M-Microcontrollers.html](http://www.freertos.org/Debugging-Hard-Faults-On-Cortex-M-Microcontrollers.html)

---

<div class="post-metadata">

**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\
**Post date:** [October 1, 2015, 4:14pm UTC](https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462/18 "2015-10-01T16:14:11Z")

</div>

**[dhruvacharya](https://sourceforge.net/u/dhruvacharya/)** wrote on [Thursday, October 01, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/17f86b2a/#9a25):

Hi Dave,

I just followed the link you provided to further debug. And defined and used the hard fault handler provided in that link.

This hard fault handler called successfully every time fault came up. And it calls the **prvGetRegistersFromStack** then I go to the location in my disassembly window which that **PC register** provided (as Guided in above link), it is every time the same location **0x0000270C**.

I have attached a screen shot of that location. It is the function called,

```auto
0x000026FC str.w	r2, [r3, #1d4]	; 0x1d4
0x00002700 bx	lr
0x00002702 push	{r4, lr}
0x00002704 ldr	r3, [pc, #ac]	; (27b4 <vTaskSwitchContext+0xc4>)
0x00002706 movs	r2, #0
0x00002708 str.w	r2, [r3, #1d4]	; 0x1d4
0x0000270C ldr.w	r2, [r3, #1ac]	; 0x1ac
0x00002710 ldr	r2, [r2, #0]

```

Here I can find in watch window that R2, R3 and some offset is used, but what I found suspicious is that **R2 contains “0xFFFFFFFF”** does that means something gone wrong here? I.e \*\*R2 overflowed or something? \*\*

---

<div class="post-metadata">

**Author:** ![rtel](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/rtel/32/31_2.png) [@rtel](https://forums.freertos.org/u/rtel)\
**Post date:** [October 1, 2015, 6:15pm UTC](https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462/19 "2015-10-01T18:15:48Z")

</div>

**[rtel](https://sourceforge.net/u/rtel/)** wrote on [Thursday, October 01, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/17f86b2a/#9a25/c69e):

Sorry if this has been asked before, but do you have [configASSERT()](http://www.freertos.org/a00110.html#configASSERT)  
defined in your application? Also please tell me which version of  
FreeRTOS you are using so I know if the asserts will catch  
mis-configured interrupt priorities.

Do you also have [configCHECK\_FOR\_STACK\_OVERFLOW](http://www.freertos.org/Stacks-and-stack-overflow-checking.html)  
set to 2?

Regards.

---

<div class="post-metadata">

**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\
**Post date:** [October 2, 2015, 6:24am UTC](https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462/20 "2015-10-02T06:24:23Z")

</div>

**[dhruvacharya](https://sourceforge.net/u/dhruvacharya/)** wrote on [Friday, October 02, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/17f86b2a/#065b):

Hi @rtel,

Yes I have defined **configASSERT()**.

I have definied this in **FreeRTOSConfig.h** :

```auto
extern void vAssertCalled ( char * u8FileName, int u8LineNum );

#define configASSERT( x ) if( ( x ) == 0 ) vAssertCalled( __FILE__ , __LINE__ )

```

And in my c file I have defined **vAssertCalled** like this :

```auto
void vAssertCalled ( char * u8FileName, int u8LineNum )
{
	/* The heap space has been execeeded. */
	taskDISABLE_INTERRUPTS();
	
	( void ) u8LineNum;
	
	uint8 CYXDATA u8TempIndex0=0;
	
	for(u8TempIndex0=0 ; u8TempIndex0<25 ; u8TempIndex0++)
	{
		if(u8FileName[u8TempIndex0]==0)
			break;
		
		u8FaultFileName[u8TempIndex0]= u8FileName[u8TempIndex0];
	}
	
	while( 1 )
    {
        /* Do nothing - this is a placeholder for a breakpoint */
		//LED_4_Write ( LED_4_Read () ^ 0x01 );
		
		//CyDelay(500);
		CY_NOP;
    }
}

```

I am using **FreeRTOS V8.2.1**. And In **FreeRTOSConfig.h** I have this:

```auto
#define configCHECK_FOR_STACK_OVERFLOW	2

```

Thank you.

[Next page](https://forums.freertos.org/t/psoc-5-lcd-128x64-my-application-program-is-running-fine-with-cy8ckit-050-but-in-my-hardware-it-hangs-on-cy-isr-intdefaulthandler-in-file-name-cm3start-c/462.md?page=2)