Hi and thanks for your answer.
Thank you for let me notice it, I learned something new. My updated code for the interrupt vector table is this one (let me know if it is correct now):
/***********************************************************************************************************************
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* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
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* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2021, 2023 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_inthandler.c
* Version : 1.0.30
* Device(s) : R9A02G0214CNE
* Description : None
* Creation Date :
***********************************************************************************************************************/
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_interrupt_handlers.h"
/* Start user code */
#include "platform.h"
extern void freertos_risc_v_exception_handler;
extern void freertos_risc_v_interrupt_handler;
extern void freertos_risc_v_mtimer_interrupt_handler;
/* End user code */
/*
* INT_ACLINT_MSIP (0x00)
*/
void INT_ACLINT_MSIP(void)
{
/* Start user code for INT_ACLINT_MSIP. Do not edit comment generated here */
asm("j freertos_risc_v_mtimer_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_ACLINT_MTIP (0x1C)
*/
void INT_ACLINT_MTIP(void)
{
/* Start user code for INT_ACLINT_MTIP. Do not edit comment generated here */
asm("j freertos_risc_v_mtimer_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR0 (0x4C)
*/
void INT_IELSR0(void)
{
/* Start user code for INT_IELSR0. Do not edit comment generated here */
asm("j freertos_risc_v_exception_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR1 (0x50)
*/
void INT_IELSR1(void)
{
/* Start user code for INT_IELSR1. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR2 (0x54)
*/
void INT_IELSR2(void)
{
/* Start user code for INT_IELSR2. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR3 (0x58)
*/
void INT_IELSR3(void)
{
/* Start user code for INT_IELSR3. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR4 (0x5C)
*/
void INT_IELSR4(void)
{
/* Start user code for INT_IELSR4. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR5 (0x60)
*/
void INT_IELSR5(void)
{
/* Start user code for INT_IELSR5. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR6 (0x64)
*/
void INT_IELSR6(void)
{
/* Start user code for INT_IELSR6. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR7 (0x68)
*/
void INT_IELSR7(void)
{
/* Start user code for INT_IELSR7. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR8 (0x6C)
*/
void INT_IELSR8(void)
{
/* Start user code for INT_IELSR8. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR9 (0x70)
*/
void INT_IELSR9(void)
{
/* Start user code for INT_IELSR9. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR10 (0x74)
*/
void INT_IELSR10(void)
{
/* Start user code for INT_IELSR10. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR11 (0x78)
*/
void INT_IELSR11(void)
{
/* Start user code for INT_IELSR11. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR12 (0x7C)
*/
void INT_IELSR12(void)
{
/* Start user code for INT_IELSR12. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR13 (0x80)
*/
void INT_IELSR13(void)
{
/* Start user code for INT_IELSR13. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR14 (0x84)
*/
void INT_IELSR14(void)
{
/* Start user code for INT_IELSR14. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR15 (0x88)
*/
void INT_IELSR15(void)
{
/* Start user code for INT_IELSR15. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR16 (0x8C)
*/
void INT_IELSR16(void)
{
/* Start user code for INT_IELSR16. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR17 (0x90)
*/
void INT_IELSR17(void)
{
/* Start user code for INT_IELSR17. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR18 (0x94)
*/
void INT_IELSR18(void)
{
/* Start user code for INT_IELSR18. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR19 (0x98)
*/
void INT_IELSR19(void)
{
/* Start user code for INT_IELSR19. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR20 (0x9C)
*/
void INT_IELSR20(void)
{
/* Start user code for INT_IELSR20. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR21 (0xA0)
*/
void INT_IELSR21(void)
{
/* Start user code for INT_IELSR21. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR22 (0xA4)
*/
void INT_IELSR22(void)
{
/* Start user code for INT_IELSR22. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR23 (0xA8)
*/
void INT_IELSR23(void)
{
/* Start user code for INT_IELSR23. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR24 (0xAC)
*/
void INT_IELSR24(void)
{
/* Start user code for INT_IELSR24. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR25 (0xB0)
*/
void INT_IELSR25(void)
{
/* Start user code for INT_IELSR25. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR26 (0xB4)
*/
void INT_IELSR26(void)
{
/* Start user code for null. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR27 (0xB8)
*/
void INT_IELSR27(void)
{
/* Start user code for INT_IELSR27. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR28 (0xBC0)
*/
void INT_IELSR28(void)
{
/* Start user code for INT_IELSR28. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR29 (0xC0)
*/
void INT_IELSR29(void)
{
/* Start user code for INT_IELSR29. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR30 (0xC4)
*/
void INT_IELSR30(void)
{
/* Start user code for INT_IELSR30. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_IELSR31 (0xC8)
*/
void INT_IELSR31(void)
{
/* Start user code for INT_IELSR31. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
/*
* INT_DUMMY for reserved interrupt source
*/
void INT_DUMMY(void)
{
/* Start user code for INT_DUMMY. Do not edit comment generated here */
asm("j freertos_risc_v_interrupt_handler");
/* End user code. Do not edit comment generated here */
}
The code for the initialization of the vector table is already written by Renesas and something make me suspect that some jumps are hard coded/hardware coded, but I’ll came back later on this.
void initialize_vect(void)
{
R_CPU_AUX->NMIADDR = (uint32_t)nmi_handler;
/* The mtvec register must be set even if the interrupt vector table is not used. */
/* Set the value (address of nvect_function()(0x1C0) >> 6) to mtvec[31:6] */
/* mtvec.BASE = 0x07; */
asm( "li t0, 0x1C2" );
asm( "csrw mtvec, t0" ); /* Set mtvec. */
/* The mtvt register must be set when using the interrupt vector table. */
/* Set the value (address of VECT_SECT(0xC0) >> 6) to mtvt[31:6] */
/* mtvt.MTVT = 0x03; */
asm( "li t0, 0xC0" );
asm( "csrw mtvt, t0" ); /* Set mtvt. */
};
As you can see in the code the line asm( "li t0, 0x1C2" ); (and the next line) sets the value of the mtvec. Even changing the last digit to 3 which would set the first bit does not make any difference.
As you have problably already seen in my main code, I try to change the vector table to my custom one with this line of code:
asm volatile ( "csrw mtvec, %0" : : "r" ( ( uintptr_t ) freertos_vector_table | 0x01 ));
but it is only used for the exception handler (first entry) and the exceptions fall into the Renesas defined vector. For more info here is the code for my custom vector table:
.global freertos_vector_table
.extern freertos_risc_v_trap_handler
.extern freertos_risc_v_exception_handler
.extern freertos_risc_v_interrupt_handler
.extern freertos_risc_v_mtimer_interrupt_handler
.balign 128, 0
.option norvc
freertos_vector_table:
IRQ_0:
j freertos_risc_v_exception_handler
IRQ_1:
j freertos_risc_v_interrupt_handler
IRQ_2:
j freertos_risc_v_interrupt_handler
IRQ_3:
j freertos_risc_v_interrupt_handler
IRQ_4:
j freertos_risc_v_interrupt_handler
IRQ_5:
j freertos_risc_v_interrupt_handler
IRQ_6:
j freertos_risc_v_interrupt_handler
IRQ_7:
j freertos_risc_v_mtimer_interrupt_handler
IRQ_8:
j freertos_risc_v_interrupt_handler
IRQ_9:
j freertos_risc_v_interrupt_handler
IRQ_10:
j freertos_risc_v_interrupt_handler
IRQ_11:
j freertos_risc_v_interrupt_handler
IRQ_12:
j freertos_risc_v_interrupt_handler
IRQ_13:
j freertos_risc_v_interrupt_handler
IRQ_14:
j freertos_risc_v_interrupt_handler
IRQ_15:
j freertos_risc_v_interrupt_handler
IRQ_LC0:
j freertos_risc_v_interrupt_handler
IRQ_LC1:
j freertos_risc_v_interrupt_handler
IRQ_LC2:
j freertos_risc_v_interrupt_handler
IRQ_LC3:
j freertos_risc_v_interrupt_handler
IRQ_LC4:
j freertos_risc_v_interrupt_handler
IRQ_LC5:
j freertos_risc_v_interrupt_handler
IRQ_LC6:
j freertos_risc_v_interrupt_handler
IRQ_LC7:
j freertos_risc_v_interrupt_handler
IRQ_LC8:
j freertos_risc_v_interrupt_handler
IRQ_LC9:
j freertos_risc_v_interrupt_handler
IRQ_LC10:
j freertos_risc_v_interrupt_handler
IRQ_LC11:
j freertos_risc_v_interrupt_handler
IRQ_LC12:
j freertos_risc_v_interrupt_handler
IRQ_LC13:
j freertos_risc_v_interrupt_handler
IRQ_LC14:
j freertos_risc_v_interrupt_handler
IRQ_LC15:
j freertos_risc_v_interrupt_handler
Don’t know if the problems are the labels (IRQ_7 for example) but that is only the case of a non standard implementation, which I am starting to suspect is my case.