Port optimized task selection on Cortex M33

hoffmann · May 5, 2021, 5:55pm

Hi,

I have seen that all ports for Cortex M33 for GCC and IAR do not include an implementation for configUSE_PORT_OPTIMISED_TASK_SELECTION in file portmacro.h
Is there a specific reason why this is not supported for CM33? Or can I simple all it to the port?

Thanks
Chris

aggarg · May 5, 2021, 10:19pm

There is no reason to not have it. Thank you for reporting it. We will add it.

gedeonag · May 12, 2021, 12:24am

Opened a github feature request for that with help wanted from the community:

mikerj · July 10, 2023, 8:32am

I recently started a project with an CM33 device using FreeRTOS V10.5.1 and discovered I couldn’t compile with configUSE_PORT_OPTIMISED_TASK_SELECTION set. The github feature request is over 2 years old now, is there a limitation of the CM33 that makes implementing this problematic?

aggarg · July 10, 2023, 9:57am

There is no limitation as such. Would you like to make a contribution?

jefftenney · July 12, 2023, 1:34am

@mikerj - this is something I could take on, unless you’d like to do it. Please let us know.

jefftenney · July 15, 2023, 5:15pm

Here is the PR. Feedback welcome.

github.com/FreeRTOS/FreeRTOS-Kernel

Add port-optimised task selection for ARMv8-M

FreeRTOS:main ← jefftenney:ARMv8-M-port-optimised-task-selection

opened 03:48PM - 12 Jul 23 UTC

jefftenney

+1730 -890

Add port-optimised task selection for ARMv8-M Description ----------- Add p…ort-optimised task selection for ARMv8-M, patterned after the existing implementation on ARMv7-M. Include a compile-time error for baseline implementations of ARMv8-M like CM23 (without the "main" extension described in the Architecture Reference Manual) attempting to use configPORT_OPTIMISED_TASK_SELECTION. Those CPUs do not support the `clz` instruction used in the implementation of port-optimised task selection. During the migration of this feature from ARMv7-M to ARMv8-M, the helper function `ucPortCountLeadingZeros()` became `ulPortCountLeadingZeros()` (returning a uint32_t, not a uint8_t) to stop forcing the compiler to generate an unnecessary `uxtb` instruction to clear out the upper 24 bits of the register. The `clz` instruction always writes a full 32-bit value to the destination register. Test Steps ----------- Copy the port files from this PR into a local clone of the full FreeRTOS distribution. Then: - Build CM33 demo app (NXP LPC55S69) in IAR with and without configPORT_OPTIMISED_TASK_SELECTION. Verify build is successful. Review generated file task.s for use/non-use of `clz` in vTaskSwitchContext(). - Build CM33 demo app (NXP LPC55S69) in GCC with and without configPORT_OPTIMISED_TASK_SELECTION. Verify build is successful. - Build CM23 demo app (Nuvoton M2351) with configPORT_OPTIMISED_TASK_SELECTION set to 1 and verify error is generated during compilation. Copy the port and kernel files from this PR into a local clone of https://github.com/jefftenney/LPTIM-Tick-U5/ (for STM32U585, CM33). Then: - Build and run with configPORT_OPTIMISED_TASK_SELECTION set to 1. Use debugger to verify use of `clz` in disassembly for vTaskSwitchContext(). - Verify correct operation of application. Checklist: ---------- [X] I have tested my changes. No regression in existing tests. ~[X] I have modified and/or added unit-tests to cover the code changes in this Pull Request.~ (N/A) Related Issues ----------- - https://forums.freertos.org/t/port-optimized-task-selection-on-cortex-m33/12521 - Closes #319 By submitting this pull request, I confirm that you can use, modify, copy, and redistribute this contribution, under the terms of your choice.

aggarg · July 19, 2023, 12:39pm

I have merged your PR @jefftenney. Thank you for your contribution!