rajdotkapoor wrote on Wednesday, October 30, 2019:
Anyone create a security port for LX6 Tensilica Cadence µController?
rajdotkapoor wrote on Wednesday, October 30, 2019:
Anyone create a security port for LX6 Tensilica Cadence µController?
rtel wrote on Wednesday, October 30, 2019:
Do you know if Cadence have this themselves? They have an extension
layer that enables their FreeRTOS port to run across a range of core
configurations, but I don’t know about that particular architecture.