# PIC18F FreeRTOS interrupt switch context

**URL:** <https://forums.freertos.org/t/pic18f-freertos-interrupt-switch-context/1717>\
**Category:** Kernel\
**Created:** [June 11, 2015, 7:23am UTC](https://forums.freertos.org/t/pic18f-freertos-interrupt-switch-context/1717 "2015-06-11T07:23:48Z")\
**Posts on this page:** 5\
**Page:** 1

<div class="post-metadata">

**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\
**Post date:** [June 11, 2015, 7:23am UTC](https://forums.freertos.org/t/pic18f-freertos-interrupt-switch-context/1717/1 "2015-06-11T07:23:48Z")

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**[mengfick](https://sourceforge.net/u/mengfick/)** wrote on [Thursday, June 11, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/4c1d4b37/#df09):

Hello,

I’am doing a project about the CAN bus using the FreeRTOS in PIC18F, but I face with a problem in the interrupt;

The PIC18 does allow two priorities of interrupt. The project is set up to use compatibility mode, so I make my own routine of interrupt for receiving the message in bus CAN, just after the routine of prvTickISR, and the problem is that if I switch the context in the routine, PIC18 will not receive the message, the program will entrer the block of vListRemove() and vListInsert() (in fonction of vTaskIncrementTick() -\> prvCheckDelayedTasks();), and I see that the number of the list is so big, about 0x69, but I just have three tasks;

I don’t understand why in the routine prvTickISR, it works to switch the context, but in my own routine, il doesn’t work at all.

Thanks in advance four your attention and work.

static void prvTickISR( void )  
{  
/\* Interrupts must have been enabled for the ISR to fire, so we have to  
save the context with interrupts enabled. \*/  
portSAVE\_CONTEXT( portGLOBAL\_INTERRUPT\_FLAG );  
PIR3bits.CCP1IF = 0;

```
/* Maintain the tick count. */
vTaskIncrementTick();

#if configUSE_PREEMPTION == 1
{
	/* Switch to the highest priority task that is ready to run. */
	vTaskSwitchContext();
}
#endif

portRESTORE_CONTEXT();

```

}

the routine like that doesn’t work:  
static void vCANRxISR (void)  
{  
portSAVE\_CONTEXT(portGLOBAL\_INTERRUPT\_FLAG);  
PIR5bits.RXB0IF = 0;

```
xSemaphoreGiveFromISR(xBinarySemaphoreCANRecv,&xHigherPriorityTaskWoken);

vTaskSwitchContext();

portRESTORE_CONTEXT();  

```

}  
static void vCANRxISR (void)  
{

```
PIR5bits.RXB0IF = 0;

xSemaphoreGiveFromISR(xBinarySemaphoreCANRecv,&xHigherPriorityTaskWoken);

taskYield(); 

```

}

the routine like that work fine:  
static void vCANRxISR (void)  
{  
PIR5bits.RXB0IF = 0;

```
xSemaphoreGiveFromISR(xBinarySemaphoreCANRecv,&xHigherPriorityTaskWoken);

```

}

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<div class="post-metadata">

**Author:** ![rtel](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/rtel/32/31_2.png) [@rtel](https://forums.freertos.org/u/rtel)\
**Post date:** [June 11, 2015, 9:37am UTC](https://forums.freertos.org/t/pic18f-freertos-interrupt-switch-context/1717/2 "2015-06-11T09:37:48Z")

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**[rtel](https://sourceforge.net/u/rtel/)** wrote on [Thursday, June 11, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/4c1d4b37/#9801):

The PIC18 is really not a good architecture for a pre-emptive OS.

There is an example ISR provided, which is called vSerialRxISR(), and is found in the \FreeRTOS\Demo\PIC18\_MPLAB\serial directory. I don’t think your code is following the same scheme.

Regards.

---

<div class="post-metadata">

**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\
**Post date:** [June 11, 2015, 9:46am UTC](https://forums.freertos.org/t/pic18f-freertos-interrupt-switch-context/1717/3 "2015-06-11T09:46:15Z")

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**[mengfick](https://sourceforge.net/u/mengfick/)** wrote on [Thursday, June 11, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/4c1d4b37/#1400):

---

<div class="post-metadata">

**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\
**Post date:** [June 11, 2015, 9:46am UTC](https://forums.freertos.org/t/pic18f-freertos-interrupt-switch-context/1717/4 "2015-06-11T09:46:32Z")

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**[mengfick](https://sourceforge.net/u/mengfick/)** wrote on [Thursday, June 11, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/4c1d4b37/#9801/a3c4):

Thanks for your reply.  
Yes, I have refered the exemple ISR vSerialRxISR(), and follow the same scheme, it works.  
But I want to know why the ISR prvTickISR() can switch the context, but in my own routine, if I use the context swtich, it doesn’t work ? and I have confirmed that is not the reason of stack overflow  
Besides the banking memory of the PIC18, there are other reasons that the pic18 is not good for a pre-emptive OS ?  
Regards

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<div class="post-metadata">

**Author:** ![rtel](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/rtel/32/31_2.png) [@rtel](https://forums.freertos.org/u/rtel)\
**Post date:** [June 11, 2015, 9:58am UTC](https://forums.freertos.org/t/pic18f-freertos-interrupt-switch-context/1717/5 "2015-06-11T09:58:08Z")

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**[rtel](https://sourceforge.net/u/rtel/)** wrote on [Thursday, June 11, 2015](https://sourceforge.net/p/freertos/discussion/382005/thread/4c1d4b37/#bc89):

Sorry - from a quick look at the code, I’m not sure either. I would suggest stepping through the interrupt from entry to exit to see if that highlights any clues.