osDelay smaller than expected

tma123 wrote on Thursday, November 08, 2018:

i’m using the STM32L152 DiscoveryIAR example and freeRTOS V9.0 as base for my Projekt on an STM32L4. especially the File STM32L_low_power_tick_management.c is interrested for our low power handling. ( https://sourceforge.net/p/freertos/code/HEAD/tree/trunk/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/STM32L_low_power_tick_management.c).
Now my problem: In “normal” operation everything works fine. I measure the time with a osDelay(500ms) and a toggling pin. But when having a lot of interrups i see a sporadic negavtive jitter of the osDelay down to ~400ms. If the timer input clock is bigger (#define lpCLOCK_INPUT_FREQUENCY ( 1000UL )) than the negative jitter happens more times. With moving the interrupt enable aftervTaskStepTick( ulCompleteTickPeriods ); (Line 366) i can reduce/compensate the negative jitter. But what i not understand is why this negativ jitter can happen, because in the “critical” sections the timer is disabled?

rtel wrote on Thursday, November 08, 2018:

Can you please confirm:

  1. This only happens when tickless idle is turned on.
  2. The tickless implementation is exactly as per the link you posted
    above, with no modifications.