# Interrupt Priority  For Cortex M series (configLIBRARY\_MAX\_SYSCALL\_INTERRUPT\_PRIORITY) 

**URL:** <https://forums.freertos.org/t/interrupt-priority-for-cortex-m-series-configlibrary-max-syscall-interrupt-priority/7058>\
**Category:** Kernel\
**Created:** [March 14, 2018, 4:08pm UTC](https://forums.freertos.org/t/interrupt-priority-for-cortex-m-series-configlibrary-max-syscall-interrupt-priority/7058 "2018-03-14T16:08:09Z")\
**Posts on this page:** 4\
**Page:** 1

<div class="post-metadata">

**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\
**Post date:** [March 14, 2018, 4:08pm UTC](https://forums.freertos.org/t/interrupt-priority-for-cortex-m-series-configlibrary-max-syscall-interrupt-priority/7058/1 "2018-03-14T16:08:09Z")

</div>

**[unknowcoder](https://sourceforge.net/u/unknowcoder/)** wrote on [Wednesday, March 14, 2018](https://sourceforge.net/p/freertos/discussion/382005/thread/fe512cff/#b92d):

Does the configLIBRARY\_MAX\_SYSCALL\_INTERRUPT\_PRIORITY fit the cortex M series priority scheme?

Let say I want to make sure interrupt prioirty 0, 1 ,2 are the highest and don’t get disable my the RTOS. Therefore interrupt 3 through 15 are to be disable.  
**Note**

- I am using ARM scheme when referenceing priorities here. i.e. Low numerical numbers are high priorities.

\*\*So I set \*\*

- configLIBRARY\_MAX\_SYSCALL\_INTERRUPT\_PRIORITY = 3  
\*\*OR \*\*
- configLIBRARY\_MAX\_SYSCALL\_INTERRUPT\_PRIORITY (15 - 3) =12

thanks

---

<div class="post-metadata">

**Author:** ![rtel](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/rtel/32/31_2.png) [@rtel](https://forums.freertos.org/u/rtel)\
**Post date:** [March 14, 2018, 4:31pm UTC](https://forums.freertos.org/t/interrupt-priority-for-cortex-m-series-configlibrary-max-syscall-interrupt-priority/7058/2 "2018-03-14T16:31:48Z")

</div>

**[rtel](https://sourceforge.net/u/rtel/)** wrote on [Wednesday, March 14, 2018](https://sourceforge.net/p/freertos/discussion/382005/thread/fe512cff/#b92d/7e69):

> Does the configLIBRARY\_MAX\_SYSCALL\_INTERRUPT\_PRIORITY fit the cortex M  
> series priority scheme?

I’m not sure I understand your question.  
configLIBRARY\_MAX\_SYSCALL\_INTERRUPT\_PRIORITY is only for Cortex-M  
devices, as far as I recall.

> Let say I want to make sure interrupt prioirty 0, 1 ,2 are the highest

Which they are - that is set by hardware.

> and don’t get disable my the RTOS. Therefore interrupt 3 through 15 are  
> to be disable.

Ok - if you have 15 priorities only, then your MCU has 4 priority bits  
(not all Cortex-M devices have the same number of priority bits).

> _Note_
> 
> - I am using ARM scheme when referenceing priorities here. i.e. Low  
> numerical numbers are high priorities.
> 
> \*So I set \*  
> /configLIBRARY\_MAX\_SYSCALL\_INTERRUPT\_PRIORITY = 3  
> \*OR \*/ configLIBRARY\_MAX\_SYSCALL\_INTERRUPT\_PRIORITY (15 - 3) =12

There are two constants that set this, you can take your pick as to  
which you want to use.

First configMAX\_SYSCALL\_INTERRUPT\_PRIORITY, which was the original  
constant, and implemented before ARM provided any libraries for the  
Cortex-M. That uses the ARM hardware scheme for priority setting, which  
is more complex than you would think it needed to be, with an attempt to  
explain it here: [RTOS for ARM Cortex-M](https://www.freertos.org/RTOS-Cortex-M3-M4.html)

Then there is configLIBRARY\_MAX\_SYSCALL\_INTERRUPT\_PRIORITY, which  
defines priorities the way the ARM libraries expect it to be defined,  
which is easier to understand, but unfortunately different to the way  
the hardware works - so the libraries manipulate the specified  
priorities before writing to the hardware registers. The main  
difference is that the libraries don’t shift priorities to the highest  
bits, whereas the hardware does.

The equation for working out one from the other is as follows:

```
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( 
configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) 
)
```

where in your case (from the information you provided) configPRIO\_BITS is 4.

---

<div class="post-metadata">

**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\
**Post date:** [March 14, 2018, 5:15pm UTC](https://forums.freertos.org/t/interrupt-priority-for-cortex-m-series-configlibrary-max-syscall-interrupt-priority/7058/3 "2018-03-14T17:15:31Z")

</div>

**[unknowcoder](https://sourceforge.net/u/unknowcoder/)** wrote on [Wednesday, March 14, 2018](https://sourceforge.net/p/freertos/discussion/382005/thread/fe512cff/#b458):

Hi Richard,  
Thanks for the response just to be absolutely clear.  
If I set “configLIBRARY\_MAX\_SYSCALL\_INTERRUPT\_PRIORITY to 3” this means that priorities 0, 1, 2 are left enabled. Where prioirties 0, 1 and 2 map to the ARM interrupt prioirties 0, 1 and 2 respectively.

---

<div class="post-metadata">

**Author:** ![rtel](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/rtel/32/31_2.png) [@rtel](https://forums.freertos.org/u/rtel)\
**Post date:** [March 14, 2018, 5:36pm UTC](https://forums.freertos.org/t/interrupt-priority-for-cortex-m-series-configlibrary-max-syscall-interrupt-priority/7058/4 "2018-03-14T17:36:46Z")

</div>

**[rtel](https://sourceforge.net/u/rtel/)** wrote on [Wednesday, March 14, 2018](https://sourceforge.net/p/freertos/discussion/382005/thread/fe512cff/#b458/bba4):

Yes - the maximum priority from which [interrupt safe] FreeRTOS API  
calls can be made will be 3.
