Implementing tickless idle on Cortex M4.

Hello, Jeff! Yes I am using “SAM4L_low_power_tick_management.c”.
And I understood when I had settings #define configTICK_RATE_HZ ((os_tick_type_t)128 ) system never went to sleep because vTaskDelay=10mS for one of my task less then 2 ticks.
As a result I had not problem when system not go to tickless sleep mode :slight_smile:
So I disabled this frequently running task and go into the same problem as before when configTICK_RATE_HZ was 256 - this configASSERT:

    /* Correct the tick count value after a period during which the tick
     * was suppressed.  Note this does *not* call the tick hook function for
     * each stepped tick. */
    configASSERT( ( xTickCount + xTicksToJump ) <= xNextTaskUnblockTime );

Thank you for your suggest to use PROPOSED EXPERIMENTAL CODE. I will test this and report here about result.

So I use PROPOSED EXPERIMENTAL CODE I have configASSERT like on the picture below.
Is the code demanding on execution time and does not accept additional instructions?

Looks like there are additional issues. In this case, line 341 in your screen shot is not calculating the fraction remaining but instead the fraction elapsed.

Existing Code:

    /* The alarm value is set to whatever fraction of a single tick
    period remains. */
    ulAlarmValue = ast_read_counter_value( AST ) - ( ulCompleteTickPeriods * ulAlarmValueForOneTick );
    if( ulAlarmValue == 0 )
    {
        /* There is no fraction remaining. */
        ulAlarmValue = ulAlarmValueForOneTick;
        ulCompleteTickPeriods++;
    }

Proposed Experimental Code:

    /* The alarm value is set to whatever fraction of a single tick
    period remains. */
    ulAlarmValue = ( ( ulCompleteTickPeriods + 1 ) * ulAlarmValueForOneTick ) - ast_read_counter_value( AST );
    /* No need to look for ulAlarmValue == 0 here */

If you feel like even more experimenting, you can try this version of the code.
SAM4L_low_power_tick_management.c (12.9 KB) I don’t have the hardware to try it. This version cleans up other issues I noticed with counting and arithmetic, and it shortens the tick ISR a bit.

Dear Jeff,
I am use code SAM4L_low_power_tick_management.c (12.9 KB) and have time after time another “configASSERT” (like on the photo below):

Further, if I use not complete file but only fix for “additional issues” ( line 341 etc.) I have not configAserts and time after time OS also “freezes” without sleep mode, but for a reason tickless - AST timer not reset (AST CONTER VALUE = 0x14B803, ALARM0 = 0x80, as a result interrupt ALARM0 never generates system ticks ). In this case If I manualy reset AST CONTER VALUE OS go back to normal RUN state.

OK - I suspect that is because the both the original code and all of my suggestions assume that the counter will still reset itself if we stop it at the ALARM value and then resume it. Let’s move to DMs for some development since I do not have the hardware. Then we’ll post the final working code here.

Here’s the final code. It’s working for @Nil, but it has not been thoroughly tested. It addresses all known issues in the same file from the SAM4L demo, including all of the issues in this thread.

SAM4L_low_power_tick_management.c (13.2 KB)

Thank you @jefftenney !