FreeRTOS+TCP with STM32F779

I don’t have permission of it. Could you help add me (my github ID: ActoryOu) into collaborator?

Thank you.

EDIT:
Sorry that I am just unable to clone submodule repos.
Trying to find more on repo.

Hi @Matio,
I don’t have same platform handy. Could you help try if below change on Makefile work?
I change include sequence to make sure the FreeRTOS-Plus-TCP header files are included with priority.

One more thing is – could you help provide function HAL_ETH_MspInit() and HAL_ETH_MspDeInit() with auto-generated ones? These two functions should be replaced with platform ones.

Thank you.

git diff Makefile:

diff --git a/Makefile b/Makefile
index c183b09..a9c4404 100644
--- a/Makefile
+++ b/Makefile
@@ -187,17 +188,7 @@ C_DEFS =  \
 AS_INCLUDES =  \
 -ICore/Inc

-# C includes
-C_INCLUDES = \
--ICore/Inc/stm32hal \
--ICore/Inc/freertos \
--ICore/Inc/application \
--IDrivers/CMSIS/Device/ST/STM32F7xx/Include \
--IDrivers/CMSIS/Include \
--IDrivers/CMSIS_RTOS_V2 \
--IDrivers/stm32f7xx_hal_driver/Inc \
--IDrivers/stm32f7xx_hal_driver/Inc/Legacy \
--IDrivers/CMSIS/Core/Include
+C_INCLUDES =

 # freertos
 C_INCLUDES += \
@@ -213,6 +204,18 @@ C_INCLUDES += \
 -IFreeRTOS/FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/source/portable/NetworkInterface/include
 # -IFreeRTOS/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/ST_Library/include

+# C includes
+C_INCLUDES += \
+-ICore/Inc/stm32hal \
+-ICore/Inc/freertos \
+-ICore/Inc/application \
+-IDrivers/CMSIS/Device/ST/STM32F7xx/Include \
+-IDrivers/CMSIS/Include \
+-IDrivers/CMSIS_RTOS_V2 \
+-IDrivers/stm32f7xx_hal_driver/Inc \
+-IDrivers/stm32f7xx_hal_driver/Inc/Legacy \
+-IDrivers/CMSIS/Core/Include
+
 # compile gcc flags
 ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections

Hello @ActoryOu,

I’m not certain about your target platform, but here are the functions for the STM32F756NGHx generated with CubeMX:

void HAL_MspInit(void)
{
  /* USER CODE BEGIN MspInit 0 */

  /* USER CODE END MspInit 0 */

  __HAL_RCC_PWR_CLK_ENABLE();
  __HAL_RCC_SYSCFG_CLK_ENABLE();

  /* System interrupt init*/
  /* PendSV_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);

  /* USER CODE BEGIN MspInit 1 */

  /* USER CODE END MspInit 1 */
}

/**
* @brief ETH MSP Initialization
* This function configures the hardware resources used in this example
* @param heth: ETH handle pointer
* @retval None
*/
void HAL_ETH_MspInit(ETH_HandleTypeDef* heth)
{
  GPIO_InitTypeDef GPIO_InitStruct = {0};
  if(heth->Instance==ETH)
  {
  /* USER CODE BEGIN ETH_MspInit 0 */

  /* USER CODE END ETH_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_ETH_CLK_ENABLE();

    __HAL_RCC_GPIOG_CLK_ENABLE();
    __HAL_RCC_GPIOC_CLK_ENABLE();
    __HAL_RCC_GPIOA_CLK_ENABLE();
    /**ETH GPIO Configuration
    PG14     ------> ETH_TXD1
    PG13     ------> ETH_TXD0
    PG11     ------> ETH_TX_EN
    PC1     ------> ETH_MDC
    PA1     ------> ETH_REF_CLK
    PC4     ------> ETH_RXD0
    PA2     ------> ETH_MDIO
    PC5     ------> ETH_RXD1
    PA7     ------> ETH_CRS_DV
    */
    GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_13|GPIO_PIN_11;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Pull = GPIO_NOPULL;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
    HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);

    GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Pull = GPIO_NOPULL;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);

    GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Pull = GPIO_NOPULL;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);

  /* USER CODE BEGIN ETH_MspInit 1 */

  /* USER CODE END ETH_MspInit 1 */
  }

}

/**
* @brief ETH MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param heth: ETH handle pointer
* @retval None
*/
void HAL_ETH_MspDeInit(ETH_HandleTypeDef* heth)
{
  if(heth->Instance==ETH)
  {
  /* USER CODE BEGIN ETH_MspDeInit 0 */

  /* USER CODE END ETH_MspDeInit 0 */
    /* Peripheral clock disable */
    __HAL_RCC_ETH_CLK_DISABLE();

    /**ETH GPIO Configuration
    PG14     ------> ETH_TXD1
    PG13     ------> ETH_TXD0
    PG11     ------> ETH_TX_EN
    PC1     ------> ETH_MDC
    PA1     ------> ETH_REF_CLK
    PC4     ------> ETH_RXD0
    PA2     ------> ETH_MDIO
    PC5     ------> ETH_RXD1
    PA7     ------> ETH_CRS_DV
    */
    HAL_GPIO_DeInit(GPIOG, GPIO_PIN_14|GPIO_PIN_13|GPIO_PIN_11);

    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5);

    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7);

  /* USER CODE BEGIN ETH_MspDeInit 1 */

  /* USER CODE END ETH_MspDeInit 1 */
  }

}

I’ve made the changes to the order of the included header files as you suggested, but there seems to be no change. The device still doesn’t respond to ping requests.

Thanks again for your help!

Hi @Matio,

In the code that you posted in the previous reply for HAL_ETH_MspInit it seems like the STM32 generated code is not enabling the ethernet interupts, the code should look something like this at the end of the HAL_ETH_MspInit() definition (ignore if you have enabled it by manually adding those lines elsewhere):

/* ETH interrupt Init */
HAL_NVIC_SetPriority(ETH_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(ETH_IRQn);
HAL_NVIC_SetPriority(ETH_WKUP_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(ETH_WKUP_IRQn);

You could enable those settings in this part of the CubeMX (not enabled in the below image):

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Hello @tony-josi-aws,

Oh wow, thank you so so much! I hadn’t enabled the necessary options in CubeMX!

It’s working perfectly now, I can successfully ping my device!

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@Matio, thanks for reporting back.

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