FreeRTOS+TCP in AMD/Xilinx Vitis 2024

Maybe it’s beneficial if I share some background:

I am not building this project from scratch but porting it from Vivado/SDK 2019 to Vivado/Vitis 2024.2.
In 2019 those parameters are defined in xparameters.h and I can confirm, that the code in x_emacpsif_physpeed.c is actually executed and the SLCR registers are written.
Because of that and because it just make sense that the clock deviders have to be set correctly, I think this could should also be executed in a project built with 2024.2.

Of course the registers may be set with another piece of code, but given that ethernet does not work when I don’t modify the code in main and does work when I do so, I’d say there’s something fishy with the examples.

And yes, does parameters should be generated by the AMD/Xilinx flow, but since they moved to the SDT based flow with Vitis Unified IDE and just don’t generate a lot of parameters that where formely placed in xparameters.h, we’re a bit screwed here.