Hi, @sounemehta88
mov SFE CSTACK, sp is for IAR only.
For GHS you can try mov ___ghsend_stack, sp.
no special settings done, worked straightforward when porting done in GHS Multi IDE but facing problems when same project migrated to Eclipse toolchain based GHS environment
Hi, guys.
GHS toolchain is now supported.
Have Fun!
Hello @mikisama ďź
Thank you for sharingďź
I ported the latest GHS code.
The confusing thing is that I encountered some system level issues and it is easy to reproduce them.
1> config_ASSERT(uxSchedulerSuspended) error
2> config_ASSERT(pxUnblockedTCB) error
3> system crashes
For issue 1 & 2 ,OS canât fetch the right pvOwner from list. pvOwner address range is wrong.
I modified _vISRWrapper funcion, put the âpushsp R20-30â before _vISRHandler is called.
Put the âpopsp r20-30â before âpopsp r6 - r7â in sequence.
After 10 hours of stress testing, Device worked well.
Anyone else has the same issue?
Hi, @Bowen_Gu
IAR and CCRH use R30 as callee-save register by default.
GHS, unlike IAR and CCRH, uses R30 as caller-save register by default.
The code in my repo uses R30 as callee-save register.
You need to add the -single_tda compiler flag to make GHS use R30 as the callee-save register.
Otherwise, you need to change the asm code and stack frame layout so that R30 is saved first as a caller-save register.
diff --git a/freertos/portable/GHS/RH850/port.c b/freertos/portable/GHS/RH850/port.c
index 7bc6f91..339c8f7 100644
--- a/freertos/portable/GHS/RH850/port.c
+++ b/freertos/portable/GHS/RH850/port.c
@@ -72,7 +72,8 @@ StackType_t *pxPortInitialiseStack( StackType_t * pxTopOfStack,
{
/* Simulate the stack frame as it would be created by a context switch
* interrupt. */
- *( pxTopOfStack ) = ( StackType_t ) prvTaskExitError; /* R31 (LP) */
+ *( pxTopOfStack ) = ( StackType_t ) 0x30303030; /* R30 (EP) */
+ *( --pxTopOfStack ) = ( StackType_t ) prvTaskExitError; /* R31 (LP) */
*( --pxTopOfStack ) = ( StackType_t ) pvParameters; /* R6 */
*( --pxTopOfStack ) = ( StackType_t ) 0x07070707; /* R7 */
*( --pxTopOfStack ) = ( StackType_t ) 0x08080808; /* R8 */
@@ -101,7 +102,6 @@ StackType_t *pxPortInitialiseStack( StackType_t * pxTopOfStack,
*( --pxTopOfStack ) = ( StackType_t ) 0x27272727; /* R27 */
*( --pxTopOfStack ) = ( StackType_t ) 0x28282828; /* R28 */
*( --pxTopOfStack ) = ( StackType_t ) 0x29292929; /* R29 */
- *( --pxTopOfStack ) = ( StackType_t ) 0x30303030; /* R30 (EP) */
return pxTopOfStack;
}
diff --git a/freertos/portable/GHS/RH850/portasm.s b/freertos/portable/GHS/RH850/portasm.s
index ddec626..24cb697 100644
--- a/freertos/portable/GHS/RH850/portasm.s
+++ b/freertos/portable/GHS/RH850/portasm.s
@@ -45,7 +45,7 @@ _vPortStartFirstTask:
ld.w 0[r2], r2
ld.w 0[r2], sp
- popsp r20 - r30 # Restore General Purpose Register (callee save register)
+ popsp r20 - r29 # Restore General Purpose Register (callee save register)
popsp r6 - r7
ldsr r7, EIPC # Restore EIPC
@@ -54,7 +54,7 @@ _vPortStartFirstTask:
popsp r1 - r2 # Restore General Purpose Register (caller save register)
popsp r6 - r19
- dispose 0, {lp}
+ dispose 0, {ep, lp}
eiret
@@ -62,7 +62,7 @@ _vPortStartFirstTask:
_vPortYieldHandler:
- prepare {lp}, 0
+ prepare {ep, lp}, 0
pushsp r6 - r19 # Save General Purpose Register (caller save register)
pushsp r1 - r2
@@ -71,7 +71,7 @@ _vPortYieldHandler:
stsr EIPC, r7 # Save EIPC
pushsp r6 - r7
- pushsp r20 - r30 # Save General Purpose Register (callee save register)
+ pushsp r20 - r29 # Save General Purpose Register (callee save register)
mov _pxCurrentTCB, r2 # pxCurrentTCB->pxTopOfStack = SP
ld.w 0[r2], r2
@@ -83,7 +83,7 @@ _vPortYieldHandler:
ld.w 0[r2], r2
ld.w 0[r2], sp
- popsp r20 - r30 # Restore General Purpose Register (callee save register)
+ popsp r20 - r29 # Restore General Purpose Register (callee save register)
popsp r6 - r7
ldsr r7, EIPC # Restore EIPC
@@ -92,7 +92,7 @@ _vPortYieldHandler:
popsp r1 - r2 # Restore General Purpose Register (caller save register)
popsp r6 - r19
- dispose 0, {lp}
+ dispose 0, {ep, lp}
eiret
@@ -100,7 +100,7 @@ _vPortYieldHandler:
_vISRWrapper:
- prepare {lp}, 0
+ prepare {ep, lp}, 0
pushsp r6 - r19 # Save General Purpose Register (caller save register)
pushsp r1 - r2
@@ -146,7 +146,7 @@ bb:
ld.w 0[r2], r2
ld.w 0[r2], sp
- pushsp r20 - r30 # Save General Purpose Register (callee save register)
+ pushsp r20 - r29 # Save General Purpose Register (callee save register)
st.w sp, 0[r2] # pxCurrentTCB->pxTopOfStack = SP
jarl _vTaskSwitchContext, lp # vTaskSwitchContext()
@@ -155,7 +155,7 @@ bb:
ld.w 0[r2], r2
ld.w 0[r2], sp
- popsp r20 - r30 # Restore General Purpose Register (callee save register)
+ popsp r20 - r29 # Restore General Purpose Register (callee save register)
br dd # }
cc: # else
@@ -170,7 +170,7 @@ dd: # }
popsp r1 - r2 # Restore General Purpose Register (caller save register)
popsp r6 - r19
- dispose 0, {lp}
+ dispose 0, {ep, lp}
eiret
Hello @mikisama ,
Thank you for your information. Thatâs really useful for me to understand why the same code couldnât run on my platfrom.
After testing, both solutions can fix interrupt nesting issue for GHS compiler.
hello All,
is there any port files for RH850/U2B family developed. if not please can you share the closest microcontroller family which i can use.
Many thanks in advance,
Kind Regards,
Deepak
Hey @deepakseshan
At the time there is not a fully supported FreeRTOS Port for the RH850 Family of Microcontrollers. The Renesas boards supported can be found in FreeRTOS-Kernel/portable/Renesas of which there are ports for the RX100, RX200, RX600, RX600v2, RX700v3_DPFPU, and the SH2A_FPU
There is the repository above that has been shared by @mikisama to create a port for the RH850, which you could take a look into if you wish
Thank you skptak for the reply, I have looked into the port layer of @mikisama for RH850 and i guess i can modify to the U2B series microcontroller.
I am new to Renesas, is there any thing in particular i should check on during the port layer modification?
Hi,
Iâm not familiar with the U2B series.
From the Renesas website, the U2B series got a new core G4MH and have multiple cores.
The repository I created only supports single-core MCUs with G3 series(G3K/G3M) cores.
I think you need to check the FreeRTOS SMP branch if you want to support mulit core.
The SMP code is now available in the main branch - you should use that and NOT the smp branch.
1 Like
I am using FreeRTOS for RH850 from this link:
github//Renesas_FreeRTOS by dinguluer
But it after few time randomly one of my task is not running, I have checked all error like stack overflow, Malloc Failed etc.
Please suggest any solutions for this.
Please suggest any solutions for this.
I am using Vector table method, single core, lots of interrupt(6).
Assuming you are talking about this repo, this is not from us. I suggest you open a GitHub issue on that repo.
Could you suggest any FreeRTOS for RH850 for CS+ IDE
Hi, @Rajeshm
You can use the CCRH port.
Create a new empty project and add the sources.
The easiest way is using CMake, everything is almost done.
Just follow the steps shows in the GIF and modify the path accordingly.
ccrh_build.webp (1483Ă792) (raw.githubusercontent.com)
Thank you @mikisama for sharing!