Question 1 Part 1
In this case, yes. This is because in this model (currently also in Chapter 6.8 of Mastering The FreeRTOS Kernel) the priority is the logical priority and not the numerical priority.
Below this graphic should be the explanation that…
The relationship between an interrupt’s numeric priority and logical priority is dependent on the
processor architecture; on some processors, the higher the numeric priority assigned to an
interrupt the higher that interrupt’s logical priority will be, while on other processor architectures
the higher the numeric priority assigned to an interrupt the lower that interrupt’s logical priority
will be.
Question 1 Part 2
This diagram, and the explanation that comes with it, is written with the logical priority in mind. Using logical priority in the explanation allows this to apply to any processor. For example, in your case the lower MCU ISR number has the higher priority than a higher numbered ISR. For other chips it may be the other way around. In both of these cases however, the highest logical priority will correspond to either the lower number (if lower number is highest priority) OR to the highest number (if highest number is highest priority).
Question 2
Interrupt Service Routines (ISRs) will always have a higher priority than any FreeRTOS task. AFAIK the only FreeRTOS task which operates with an ISR priority level is the timer tick, which operates at the lower priority level (also covered in the chapter).
Question 3
I can see how the or 95 as only the top four bits are implemented can be confusing. I n this case 95 would be the decimal value of the byte (aka 0x5F) after the shift. The lowest priority would have a value of 255 (aka 0xFF) after the shift. This exact scenario is explained on page 232 of Mastering FreeRTOS
This port should already have the priorities in the same range - but feel free to play around with the code.