# FreeRTOS efm32gg - simulating interrupts

**URL:** <https://forums.freertos.org/t/freertos-efm32gg-simulating-interrupts/7112>\
**Category:** Kernel\
**Created:** [April 5, 2018, 7:32pm UTC](https://forums.freertos.org/t/freertos-efm32gg-simulating-interrupts/7112 "2018-04-05T19:32:25Z")\
**Posts on this page:** 2\
**Page:** 1

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**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\
**Post date:** [April 5, 2018, 7:32pm UTC](https://forums.freertos.org/t/freertos-efm32gg-simulating-interrupts/7112/1 "2018-04-05T19:32:25Z")

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**[ahcw](https://sourceforge.net/u/ahcw/)** wrote on [Thursday, April 05, 2018](https://sourceforge.net/p/freertos/discussion/382005/thread/50a271bd/#701b):

I’m trying to convert a windows FreeRTOS sempahore example to be used with efm32gg. This is example 16 in Amazon’s FreeRTOS Developer Guide located [here](https://docs.aws.amazon.com/freertos-kernel/latest/dg/interrupt-management.html)

I believe I narrowed down the conversion to the difference between two commands:

- vPortSetInterruptHandler( mainINTERRUPT\_NUMBER, ulExampleInterruptHandler );
- vPortGenerateSimulatedInterrupt( mainINTERRUPT\_NUMBER );

As best as I understand, these are commands that simulate interrupts in Windows. Does anyone know the equivalent commands for efm32gg?

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<div class="post-metadata">

**Author:** ![rtel](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/rtel/32/31_2.png) [@rtel](https://forums.freertos.org/u/rtel)\
**Post date:** [April 5, 2018, 10:26pm UTC](https://forums.freertos.org/t/freertos-efm32gg-simulating-interrupts/7112/2 "2018-04-05T22:26:16Z")

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**[rtel](https://sourceforge.net/u/rtel/)** wrote on [Thursday, April 05, 2018](https://sourceforge.net/p/freertos/discussion/382005/thread/50a271bd/#701b/6c6d):

> - vPortSetInterruptHandler( mainINTERRUPT\_NUMBER,  
> ulExampleInterruptHandler );

There is no equivalent - the Windows port is a bit unique here in that  
you can’t install a real handler. In the other ports (real MCUs), just  
install the interrupt handler in the vector table as you would any other.

> - vPortGenerateSimulatedInterrupt( mainINTERRUPT\_NUMBER );

The Cortex-M has a set of SetPending registers, where if you set a bit  
for a particular interrupt, that interrupt will execute if it is  
enabled. There are probably CMSIS functions for the same, but I’m not sure.

Here is an example mainTRIGGER\_INTERRUPT() macro from the LPC17xx  
version of the book examples, which does actually appear to be using a  
CMSIS function to pend the interrupt, despite what I just wrote above:

```
#define mainTRIGGER_INTERRUPT()	NVIC_SetPendingIRQ( mainSW_INTERRUPT_ID )
```

This is how the interrupt was configured in the first place:

```
static void prvSetupSoftwareInterrupt( void )
{
     /* The interrupt service routine uses an (interrupt safe) FreeRTOS 
API function so the interrupt priority must be at or below the priority
defined	by configSYSCALL_INTERRUPT_PRIORITY. */
     NVIC_SetPriority( mainSW_INTERRUPT_ID, 
mainSOFTWARE_INTERRUPT_PRIORITY );

     /* Enable the interrupt. */
     NVIC_EnableIRQ( mainSW_INTERRUPT_ID );
}
```

and here is the handler:

```
void vSoftwareInterruptHandler( void )
{
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;

     /* 'Give' the semaphore to unblock the task. */
     xSemaphoreGiveFromISR( xBinarySemaphore, &xHigherPriorityTaskWoken );

     /* Clear the software interrupt bit using the interrupt controllers
     Clear Pending register. */
     mainCLEAR_INTERRUPT();

     /* Giving the semaphore may have unblocked a task - if it did and the
     unblocked task has a priority equal to or above the currently executing
     task then xHigherPriorityTaskWoken will have been set to pdTRUE and
     portEND_SWITCHING_ISR() will force a context switch to the newly 
unblocked
     higher priority task.

     NOTE: The syntax for forcing a context switch within an ISR varies 
between
     FreeRTOS ports. The portEND_SWITCHING_ISR() macro is provided as 
part of
     the Cortex M3 port layer for this purpose. taskYIELD() must never 
be called
     from an ISR! */
     portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
}
```
