# FreeRTOS and dual core **URL:** \ **Category:** Kernel\ **Created:** [May 29, 2020, 10:31pm UTC](https://forums.freertos.org/t/freertos-and-dual-core/9922 "2020-05-29T22:31:58Z")\ **Posts on this page:** 8\ **Page:** 1
**Author:** ![dudette](https://avatars.discourse-cdn.com/v4/letter/d/b5e925/32.png) [@dudette](https://forums.freertos.org/u/dudette)\ **Post date:** [May 29, 2020, 10:31pm UTC](https://forums.freertos.org/t/freertos-and-dual-core/9922/1 "2020-05-29T22:31:58Z")
Does FreeRTOS support dual core? I mean is it possible to switch tasks between two cores or assign tasks to one or another core? Sorry I was not able to find anything within the FreeRTOS manual, but at the same time I was told that FreeRTOS does support dual core communication 😕 ---
**Author:** ![richard-damon](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/richard-damon/32/38_2.png) [@richard-damon](https://forums.freertos.org/u/richard-damon)\ **Post date:** [May 29, 2020, 10:51pm UTC](https://forums.freertos.org/t/freertos-and-dual-core/9922/2 "2020-05-29T22:51:01Z")
FreeRTOS, in its official release, is a single core system. It can be used in an ‘asymmetric’ manner on a multicore system, where a separate copy runs on each core, and using user-level interactions to send messages between cores. There are some ‘unofficial’ ports to handle multi-core systems in a symmetric manner, where there is one copy of FreeRTOS and tasks on the two cores can interact fairly freely (and I think tasks can move from core to core). These ports do need somewhat significant changes to how some things operate internally in FreeRTOS, as multicore system have a bunch of additional issues they need to deal with. ---
**Author:** ![carlk3](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/carlk3/32/266_2.png) [@carlk3](https://forums.freertos.org/u/carlk3)\ **Post date:** [June 3, 2020, 3:08pm UTC](https://forums.freertos.org/t/freertos-and-dual-core/9922/3 "2020-06-03T15:08:05Z")
You might find this interesting: > **[Simple Multicore Core to Core Communication Using FreeRTOS message buffers -...](https://www.freertos.org/2020/02/simple-multicore-core-to-core-communication-using-freertos-message-buffers.html)** > > \[The STM32H745I demo in the FreeRTOS download provides a worked example of the control buffer scheme described below.\] In this post I describe how to implement a basic and light weight core to core communication scheme using FreeRTOS Message Buffers,... ---
**Author:** ![richard-damon](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/richard-damon/32/38_2.png) [@richard-damon](https://forums.freertos.org/u/richard-damon)\ **Post date:** [June 4, 2020, 12:00am UTC](https://forums.freertos.org/t/freertos-and-dual-core/9922/4 "2020-06-04T00:00:16Z")
Yes, that article points out that Message Buffers can be used between two instances of FreeRTOS running in a Asymmetrical MultiProcessor configuration. ---
**Author:** ![dudette](https://avatars.discourse-cdn.com/v4/letter/d/b5e925/32.png) [@dudette](https://forums.freertos.org/u/dudette)\ **Post date:** [June 4, 2020, 4:34pm UTC](https://forums.freertos.org/t/freertos-and-dual-core/9922/5 "2020-06-04T16:34:40Z")
thank you, ill look into it ---
**Author:** ![dookei](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/dookei/32/2927_2.png) [@dookei](https://forums.freertos.org/u/dookei)\ **Post date:** [October 25, 2022, 10:02am UTC](https://forums.freertos.org/t/freertos-and-dual-core/9922/6 "2022-10-25T10:02:59Z")
Hi there, I am currently developing a project where I would like to keep CMSIS-RTOS portability and interface compatibility. This is probably a “little” late question: But since only queues are available throught the CMSIS-RTOS(correct me if I am wrong) would it be possible to implement a Queue based IPC for AMP communicaton method instead? What could be the problems ? Should I still send an interrupt to the receiving Core? Many thanks! ---
**Author:** ![richard-damon](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/richard-damon/32/38_2.png) [@richard-damon](https://forums.freertos.org/u/richard-damon)\ **Post date:** [October 25, 2022, 2:40pm UTC](https://forums.freertos.org/t/freertos-and-dual-core/9922/7 "2022-10-25T14:40:43Z")
I don’t think CMSIS-RTOS was designed for dual-core AMP configurations (and maybe not SMP as well), Note the Stream-Buffer for inter-core limitation is a Dual-AMP limitation only (as I remember), the SMP versions allow for cross core semaphores and queue (as the RTOS is naturally cross core in SMP). ---
**Author:** ![dookei](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/dookei/32/2927_2.png) [@dookei](https://forums.freertos.org/u/dookei)\ **Post date:** [October 25, 2022, 6:36pm UTC](https://forums.freertos.org/t/freertos-and-dual-core/9922/8 "2022-10-25T18:36:23Z")
Thank you very much for your prompt reply @richard-damon