rtel wrote on Thursday, July 14, 2016:
Unless I misunderstand, I think it would be more accurate to say you
need paging, rather than dynamic code loading. Paging normally being a
scheme whereby code that is to large to fit in an executable region is
swapped into and out of an executable region (RAM in your case) as it is
needed.
Normally that does require an MMU, in order to get the virtual memory
space. It is also very slow for a real time system if the QSPI is slow.
As you don’t have an MMU it might be possible to do this using a
combination of dynamic loading and paging. In that case you would need
to build each swappable image into the same address space, so you would
have multiple separate build images, and swap those in and out.
To be honest, I think this will be very complex on a Cortex-M0.