Hi Allfather (welcome btw),
I absolutely agree that in order to establish “mutual exclusion” between two threads of execution of which at least one is an interrupt, only inhibiting those interrupts that might be involved in data corruption is the best solution and should definitely be preferred over using the critical section (CS). The main purpose of the CS is to provide uniterruptable code blocks for the FreeRTOS kernel to prevent data corruption of the internal data structures. It’s like a nuclear war head in the combat against synchronization problems as claiming the CS effectively stalls the OS and every task and ISR managed by the OS.
Many many code examples overuse the CS to enforce “simple” mutual exclusion where it is not needed. I believe the reason for that is that FreeRTOS is very portable, and coding for it should be as generic as possible. Not all targets support fine granularity interrupt disabling, so the CS is sort of like the smallest common denominator.
I do strongly recommend using less invasive interrupt disabling where the platform allows that. On the Cortex M, you can even do that on either of two levels: The NVIC level and the device level (eg UART).