Define name issue: portNVIC_SYSPRI2_REG in ARM_CM4F port

mr68360 wrote on Thursday, November 05, 2015:

The ARM documentation lists three System Handler Priority Registers: SHPR1, SHPR2, SHPR3. SHPR3, the register controlling SysTick and PendSV, is at address 0xe000ed20.

Address 0xe000ed20, however, is defined in FreeRTOS 8.2.3 as portNVIC_SYSPRI2_REG. Is the intent of the #define to reflect the register’s ordinality (SYSPRI3 ??). If so, it would be more accurate to call this macro portNVIC_SYSPRI3_REG.

Code maintainers please note.

rtel wrote on Thursday, November 05, 2015:

I’ve just been looking at this.

As you say there are three such registers, and they appear in order at addresses 0xe000ed18, 0xe000ed1c and 0xe000ed20.

The lines…

portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;

…are, as you say writing to 0xe000ed20. If 0xe000ed18 is syspri 0, 0xe000ed1c is syspri 1, then 0xe000ed20 would be syspri 2.

I cannot see the name SHPR3 being used in the Cortex-M technical reference manual. Where does that register name come from?