# CortexM3 HardFault with FreeRTOS7.5.2 **URL:** \ **Category:** Kernel\ **Created:** [December 6, 2013, 4:15am UTC](https://forums.freertos.org/t/cortexm3-hardfault-with-freertos7-5-2/2865 "2013-12-06T04:15:01Z")\ **Posts on this page:** 6\ **Page:** 1
**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\ **Post date:** [December 6, 2013, 4:15am UTC](https://forums.freertos.org/t/cortexm3-hardfault-with-freertos7-5-2/2865/1 "2013-12-06T04:15:01Z")
**[vicui](https://sourceforge.net/u/vicui/)** wrote on [Friday, December 06, 2013](https://sourceforge.net/p/freertos/discussion/382005/thread/80f3897b/#2898): ALL my Cortex M3 happen Hardfault after running some time. it is long sometimes and short sometimes. no rule. and it use FreeRTOS7.5.2, after Hardfault, I dump CPU context as following [Hard fault handler] R0 = 2e R1 = 0 R2 = ffffffff R3 = 20005f48 R12 = 4f588000 LR = fffffffd PC = 28024f14 PSR = 21000035 BFAR = e000ed38 CFSR = 100 HFSR = 40000000 DFSR = 0 AFSR = 0 it is strange that PC value is not a valid address, anyone meet same problem ? ---
**Author:** ![rtel](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/rtel/32/31_2.png) [@rtel](https://forums.freertos.org/u/rtel)\ **Post date:** [December 6, 2013, 10:31am UTC](https://forums.freertos.org/t/cortexm3-hardfault-with-freertos7-5-2/2865/2 "2013-12-06T10:31:38Z")
**[rtel](https://sourceforge.net/u/rtel/)** wrote on [Friday, December 06, 2013](https://sourceforge.net/p/freertos/discussion/382005/thread/80f3897b/#6c14): If the dump was done while you were in the hardfault handler then I would expect the PC to point to code inside the hardfault handler. I would suggest starting here: [http://www.freertos.org/FAQHelp.html](http://www.freertos.org/FAQHelp.html) for a list of possible problems if the hardfault is occurring in FreeRTOS itself (rather than in your application). Regards. ---
**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\ **Post date:** [December 10, 2013, 5:48am UTC](https://forums.freertos.org/t/cortexm3-hardfault-with-freertos7-5-2/2865/3 "2013-12-10T05:48:48Z")
**[vicui](https://sourceforge.net/u/vicui/)** wrote on [Tuesday, December 10, 2013](https://sourceforge.net/p/freertos/discussion/382005/thread/80f3897b/#8305): I always enable conf\_assert and make sure that there is no assert when hardfault happen. I start to guess HW issue and collect more record about PC value, it may be 0x0Cxxxxxx, 0x28xxxxxx, 0xc8xxxxxx, it is random case ---
**Author:** ![rtel](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/rtel/32/31_2.png) [@rtel](https://forums.freertos.org/u/rtel)\ **Post date:** [December 10, 2013, 8:43am UTC](https://forums.freertos.org/t/cortexm3-hardfault-with-freertos7-5-2/2865/4 "2013-12-10T08:43:34Z")
**[rtel](https://sourceforge.net/u/rtel/)** wrote on [Tuesday, December 10, 2013](https://sourceforge.net/p/freertos/discussion/382005/thread/80f3897b/#5584): How are you working out the PC value? Regards. ---
**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\ **Post date:** [December 11, 2013, 12:39am UTC](https://forums.freertos.org/t/cortexm3-hardfault-with-freertos7-5-2/2865/5 "2013-12-11T00:39:11Z")
**[vicui](https://sourceforge.net/u/vicui/)** wrote on [Wednesday, December 11, 2013](https://sourceforge.net/p/freertos/discussion/382005/thread/80f3897b/#12aa): use following code to save cpu context when hardfault happen IMPORT hard\_fault\_handler\_c TST LR, #4 ITE EQ MRSEQ R0, MSP MRSNE R0, PSP B hard\_fault\_handler\_c then, go to hardfault\_handle to dump those context void hard\_fault\_handler\_c(unsigned int \* hardfault\_args) { unsigned int stacked\_r0; unsigned int stacked\_r1; unsigned int stacked\_r2; unsigned int stacked\_r3; unsigned int stacked\_r12; unsigned int stacked\_lr; unsigned int stacked\_pc; unsigned int stacked\_psr; ``` while(1) { stacked_r0 = ((unsigned long) hardfault_args[0]); stacked_r1 = ((unsigned long) hardfault_args[1]); stacked_r2 = ((unsigned long) hardfault_args[2]); stacked_r3 = ((unsigned long) hardfault_args[3]); stacked_r12 = ((unsigned long) hardfault_args[4]); stacked_lr = ((unsigned long) hardfault_args[5]); stacked_pc = ((unsigned long) hardfault_args[6]); stacked_psr = ((unsigned long) hardfault_args[7]); printf ("[Hard fault handler]\n"); printf ("R0 = %x\n", stacked_r0); printf ("R1 = %x\n", stacked_r1); printf ("R2 = %x\n", stacked_r2); printf ("R3 = %x\n", stacked_r3); printf ("R12 = %x\n", stacked_r12); printf ("LR = %x\n", stacked_lr); printf ("PC = %x\n", stacked_pc); printf ("PSR = %x\n", stacked_psr); printf ("BFAR = %x\n", (*((volatile unsigned long *)(0xE000ED38)))); printf ("CFSR = %x\n", (*((volatile unsigned long *)(0xE000ED28)))); printf ("HFSR = %x\n", (*((volatile unsigned long *)(0xE000ED2C)))); printf ("DFSR = %x\n", (*((volatile unsigned long *)(0xE000ED30)))); printf ("AFSR = %x\n", (*((volatile unsigned long *)(0xE000ED3C)))); printf ("SCB_SHCSR = %x\n", SCB->SHCSR); getkeychar(); } ``` } ---
**Author:** ![system](https://d2v6vdsk2p900z.cloudfront.net/original/1X/7fc8fdb729c645aab5b20282bbe34e57cb407be6.jpeg) [@system](https://forums.freertos.org/u/system)\ **Post date:** [December 11, 2013, 9:11am UTC](https://forums.freertos.org/t/cortexm3-hardfault-with-freertos7-5-2/2865/6 "2013-12-11T09:11:05Z")
**[davedoors](https://sourceforge.net/u/davedoors/)** wrote on [Wednesday, December 11, 2013](https://sourceforge.net/p/freertos/discussion/382005/thread/80f3897b/#3973): Could the problem be in the printf() from an exception handler? If you look at the value of stacked\_pc in the debugger does it match the value printed out?