Cortex-A9 port: disable interrupts before writing to ICC_PMR

According to what has been done with FreeRTOS I suppose the macro in the Percepio View library should be updated. However, this is only a problem in multi-core and, according to my knowledge, it should not be a problem in any already contributed port that supports SMP. The issue is only present in the custom SMP Cortex-A9 port I am using, this is why I also suggested possible ways to fix it on my end.