Hi, this topic comes right after I discovered that interrupts where enabled within vTaskSwitchContext in a previous topic . The problem is present when configNUMBER_OF_CORES is higher than 1 and configCHECK_FOR_STACK_OVERFLOW is defined, either to 1 or 2. In this case, pxCurrentTCB is defined in task…

[image] Matth9814: The issue is only present in the custom SMP Cortex-A9 port I am using, this is why I also suggested possible ways to fix it on my end. You are right. IfportSET_INTERRUPT_MASK and portCLEAR_INTERRUPT_MASK are implemented to support recursive calls, then this problem won’t h…

You are right. The stack macros should access TCB directly as the interrupts are already blocked. I’ll get back to you with a proposal.

I tried both the previously proposed approaches: Check if the interrupt are already disabled and skip the execution of portCPU_IRQ_DISABLE() and portCPU_IRQ_ENABLE() before the modification of the PM Register. Remove portCPU_IRQ_DISABLE() and portCPU_IRQ_ENABLE() from vPortClearInterruptMask and u…

couldn’t your solution 1 be subject to race conditions where the condition changes in between its check and the follow up?

The code I am using is the following one: #define portCPU_IRQ_DISABLE() \ __asm volatile ( "CPSID i" ::: "memory" ); \ __asm volatile ( "DSB" ); \ __asm volatile ( "ISB" ); #define portCPU_…

Hi @aggarg , do you have any official news about this matter?

Hi @Matth9814 , Apologies for the delay in response. Would you please try the following patch and see if it addresses your issue - stack_macros_smp_fix.patch (20.5 KB)?

Thank you for addressing this issue, the patched code works as expected.

Thank you for confirming! Would you like to raise a PR for this or would you like us to?

I am going to do it, thank you.

Cortex-A9 port: disable interrupts before writing to ICC_PMR

Kernel

aggarg (Gaurav Aggarwal) April 30, 2025, 6:14am 11

Thank you for raising the PR - FreeRTOS SMP: direct access to current TCB inside stack macros by Matth9814 · Pull Request #1270 · FreeRTOS/FreeRTOS-Kernel · GitHub.

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Cortex-A9 port: disable interrupts before writing to ICC_PMR

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