# Build Issue ADC-SoC board CORTEX\_A9\_Cyclone\_V\_SoC\_DK Demo **URL:** \ **Category:** Kernel\ **Created:** [January 18, 2022, 2:28pm UTC](https://forums.freertos.org/t/build-issue-adc-soc-board-cortex-a9-cyclone-v-soc-dk-demo/14246 "2022-01-18T14:28:39Z")\ **Posts on this page:** 8\ **Page:** 1
**Author:** ![MathieuS](https://avatars.discourse-cdn.com/v4/letter/m/4bbf92/32.png) [@MathieuS](https://forums.freertos.org/u/MathieuS)\ **Post date:** [January 18, 2022, 2:28pm UTC](https://forums.freertos.org/t/build-issue-adc-soc-board-cortex-a9-cyclone-v-soc-dk-demo/14246/1 "2022-01-18T14:28:39Z")
Hi Everybody, I’m trying to setup FreeRTOS on the ADC-SoC board from Terasic which use the Cyclone V. So I tried to use the Demo “CORTEX\_A9\_Cyclone\_V\_SoC\_DK” but when I tried to build it I had a lot of errors. And for now I still have some. (I already worked on FreeRTOS with a STM32F446RE but I didn’t have to do the setup like here). That’s why I’m asking your help today. Context: Download FreeRTOS Demo from FreeRTOS Website Use “ARM DS IDE 2021.1” with a license Toolchain = GCC 7.5.0 [arm-eabi] Here I describe each steps followed in order to try to solve the problem: 1. Import project from directory and Try to build 1 =\> Includes error 2. add Includes path in the project properties, try to build 2 =\> Error: configTASK\_NOTIFICATION\_ARRAY\_ENTRIES to be at least 3 3. Set configTASK\_NOTIFICATION\_ARRAY\_ENTRIES at 3, try to build 3 =\> Assembly Errors 4. Put all informations (Project properties) -march, mcpu, … = armv7-a ; cortex-a9 ; vfpv3 ; softfp ; Try to build 4 =\> Error in alt\_interrupt\_armcc.s 5. Exclude from build alt\_interrupt\_armcc.s ; Exclude fpga\_support.c ; (I saw this step in a Topic on the forum) 6. Error =\> Undefined ref vApplicationDaemonTaskStartupHook; Undefined ref \_\_cs3\_interrupt\_vector 7. Set configUSE\_DAEMON\_TASK\_STARTUP\_HOOK to 0 8. I tried to add the linker file “cycloneV-dk-ram.ld” (Project Properties) =\> It appears two errors, one for a file named “arm-named.inc” and one for librairies to use -lcs3 -lcs3unhosted -lcs3arm 9. I found those files in the altera folder for quartus, I decided to copy them in order to put them where needed which solve the previous issue. Then I had others errors which depend on the “cycloneV-dk-ram.ld” file: /home/tcwg-buildslave/workspace/tcwg-make-release\_0/snapshots/newlib.git~linaro-local~linaro-newlib-2\_5\_0/newlib/libc/sys/arm/crt0.S:273: undefined reference to `initialise_monitor_handles' /home/tcwg-buildslave/workspace/tcwg-make-release_0/snapshots/newlib.git~linaro-local~linaro-newlib-2_5_0/newlib/libc/sys/arm/crt0.S:405: undefined reference to ` **bss\_start** ’ /home/tcwg-buildslave/workspace/tcwg-make-release\_0/snapshots/newlib.git~linaro-local~linaro-newlib-2\_5\_0/newlib/libc/sys/arm/crt0.S:405: undefined reference to ` __bss_end__' /home/tcwg-buildslave/workspace/tcwg-make-release_0/snapshots/newlib.git~linaro-local~linaro-newlib-2_5_0/newlib/libc/sys/arm/crt0.S:405: undefined reference to ` **end** ’ But I don’t know how to solve them, especially the first one Does anybody have an idea to help me to solve this problem ? Or does anybody already manage to make this demo work ? Tell me if you think I did a mistake in the steps above Thanks a lot in advance for your help ! P.S.: I already searched on the forum topics which talk about FreeRTOS on Cyclone V, some topics helped me to solve some issues or to verify what I made, but i still have some issues. ---
**Author:** ![htibosch](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/htibosch/32/62_2.png) [@htibosch](https://forums.freertos.org/u/htibosch)\ **Post date:** [January 19, 2022, 1:06am UTC](https://forums.freertos.org/t/build-issue-adc-soc-board-cortex-a9-cyclone-v-soc-dk-demo/14246/2 "2022-01-19T01:06:25Z")
Hi [Mathieu](https://forums.freertos.org/u/MathieuS), not sure if it helps but [here](https://github.com/htibosch/cyclone_freertos) is a FreeRTOS project that runs on a CORTEX A9 Cyclone-V board from Altera. It is a makefile project: run make from the directory that contains “config.mk” and “makefile”. I used it to develop a FreeRTOS+TCP network interface for the Cyclone. Note that the kernel and the +TCP libraries are quite old already and need to be updated from [here](https://github.com/freertos/freertos) and [here](https://github.com/FreeRTOS/FreeRTOS-Plus-TCP). Please note this comment in `config.mk`: ```auto include user_config.mk # Example contents of user_config.mk : # GCC_BIN=C:/intelFPGA_pro/17.0/embedded/host_tools/mentor/gnu/arm/baremetal/bin # GCC_PREFIX=arm-altera-eabi ``` ---
**Author:** ![MathieuS](https://avatars.discourse-cdn.com/v4/letter/m/4bbf92/32.png) [@MathieuS](https://forums.freertos.org/u/MathieuS)\ **Post date:** [January 19, 2022, 2:02pm UTC](https://forums.freertos.org/t/build-issue-adc-soc-board-cortex-a9-cyclone-v-soc-dk-demo/14246/3 "2022-01-19T14:02:01Z")
Hi, thank you for your answer ! I will try with the project you linked me. For now I did the “user\_config.mk” with the two following lines: GCC\_BIN=/home/ubuntu01/intelFPGA/20.1/embedded/host\_tools/linaro/gcc/bin GCC\_PREFIX=arm-eabi And I tried to do the make but I have an error about a missing include file (“FreeRTOS.h”). I suppose the only one thing I can do is to specify the path for each. ---
**Author:** ![htibosch](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/htibosch/32/62_2.png) [@htibosch](https://forums.freertos.org/u/htibosch)\ **Post date:** [January 19, 2022, 2:16pm UTC](https://forums.freertos.org/t/build-issue-adc-soc-board-cortex-a9-cyclone-v-soc-dk-demo/14246/4 "2022-01-19T14:16:49Z")
Hi [Mathieu](https://forums.freertos.org/u/MathieuS), if you want, send an email to hein [at] htibosch [dot] net, and we will get through this more quickly. OK? ---
**Author:** ![mark1122](https://avatars.discourse-cdn.com/v4/letter/m/c0e974/32.png) [@mark1122](https://forums.freertos.org/u/mark1122)\ **Post date:** [February 20, 2022, 10:18pm UTC](https://forums.freertos.org/t/build-issue-adc-soc-board-cortex-a9-cyclone-v-soc-dk-demo/14246/5 "2022-02-20T22:18:27Z")
Hi Hein, I tried your GIT repo on a Terasic DE1 board and it works fine. Good work! 👍 ---
**Author:** ![htibosch](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/htibosch/32/62_2.png) [@htibosch](https://forums.freertos.org/u/htibosch)\ **Post date:** [February 21, 2022, 4:56am UTC](https://forums.freertos.org/t/build-issue-adc-soc-board-cortex-a9-cyclone-v-soc-dk-demo/14246/6 "2022-02-21T04:56:44Z")
@mark1122 wrote: > I tried your GIT repo on a Terasic DE1 board and it works fine. Good work! Thank you. I wrote the Cyclone +TCP driver for [jt.fo](https://www.jt.fo), who were so friendly to share it with the FreeRTOS community. The Makefile assumes that the path leading to the project has no spaces. @MathieuS had problems compiling because of that. ---
**Author:** ![bhavin1968](https://avatars.discourse-cdn.com/v4/letter/b/90db22/32.png) [@bhavin1968](https://forums.freertos.org/u/bhavin1968)\ **Post date:** [November 21, 2022, 4:25pm UTC](https://forums.freertos.org/t/build-issue-adc-soc-board-cortex-a9-cyclone-v-soc-dk-demo/14246/7 "2022-11-21T16:25:42Z")
I have downloaded your TCP demo and trying to run on Cortex A9 Cyclone-V board. I am getting link up and down events but not EMAC1 interrupt. Do i have to run this on core 1?. Which core (0,1)EMAC1 interrupt is tied to, or it does not matter. ---
**Author:** ![skptak](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/skptak/32/3981_2.png) [@skptak](https://forums.freertos.org/u/skptak)\ **Post date:** [November 23, 2022, 4:40pm UTC](https://forums.freertos.org/t/build-issue-adc-soc-board-cortex-a9-cyclone-v-soc-dk-demo/14246/8 "2022-11-23T16:40:17Z")
Hey @bhavin1968, I see that you were seeing the link up and down events but not the interrupt. I was wondering if you had tried running it on only a single core, as you had asked about, and if doing that yielded the outcome you were hoping for?