# Are there demo projects for Multi EMAC Zynq 7000

**URL:** <https://forums.freertos.org/t/are-there-demo-projects-for-multi-emac-zynq-7000/13109>\
**Category:** Xilinx\
**Tags:** debug, tutorial\
**Created:** [July 27, 2021, 1:10pm UTC](https://forums.freertos.org/t/are-there-demo-projects-for-multi-emac-zynq-7000/13109 "2021-07-27T13:10:16Z")\
**Posts on this page:** 3\
**Page:** 1

<div class="post-metadata">

**Author:** ![AnandPavaskar](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/anandpavaskar/32/1780_2.png) [@AnandPavaskar](https://forums.freertos.org/u/AnandPavaskar)\
**Post date:** [July 27, 2021, 1:10pm UTC](https://forums.freertos.org/t/are-there-demo-projects-for-multi-emac-zynq-7000/13109/1 "2021-07-27T13:10:16Z")

</div>

HI,

I got some updates from here github\FreeRTOS\FreeRTOS-Plus-TCP\pull\249 (could not add full link)  
, and trying to integrate the sources to FreeRTOS.  
However are there avilable demos for me to use readily so I can get some debug time saved and move on to my new transport and application layer works.

---

<div class="post-metadata">

**Author:** ![htibosch](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/htibosch/32/62_2.png) [@htibosch](https://forums.freertos.org/u/htibosch)\
**Post date:** [July 28, 2021, 5:48am UTC](https://forums.freertos.org/t/are-there-demo-projects-for-multi-emac-zynq-7000/13109/2 "2021-07-28T05:48:49Z")

</div>

Hello @AnandPavaskar,

There is a [Makefile project](https://github.com/htibosch/freertos_plus_projects/tree/master/plus/xilinx) for Zynq 7000.

It is configurable through the file “plus/xilinx/RTOSDemo/config.mk”. For instance, you will find these defines:

```auto
    ipconfigMULTI_INTERFACE=true
    ipconfigUSE_IPv6=true

```

You will also have to indicate the location of your compiler in `XILINX_PATH`:

```auto
    XILINX_PATH=H:/Xilinx_2019.1/SDK/2019.1

```

The IP-addresses and end-points are configured in directly in the code “plus/xilinx/RTOSDemo/src/main.c”.  
Note that for IPv6 you have a choice of using Router Advertisement ( “RA” ) or DHCPv6.

```auto
#define ipconfigUSE_RA 1
#define ipconfigUSE_DHCPv6 1

```

The libraries found in this repository usually outdated. It is better to download them directly from the original locations like:

[FreeRTOS kernel](https://github.com/FreeRTOS/FreeRTOS-Kernel)  
[FreeRTOS-Plus-TCP](https://github.com/FreeRTOS/FreeRTOS-Plus-TCP)  
[FreeRTOS-Plus-TCP-multi](https://github.com/FreeRTOS/FreeRTOS-Plus-TCP/tree/labs/ipv6_multi)

---

<div class="post-metadata">

**Author:** ![AnandPavaskar](https://d3iykfbgfh8zhg.cloudfront.net/user_avatar/forums.freertos.org/anandpavaskar/32/1780_2.png) [@AnandPavaskar](https://forums.freertos.org/u/AnandPavaskar)\
**Post date:** [August 8, 2021, 2:39pm UTC](https://forums.freertos.org/t/are-there-demo-projects-for-multi-emac-zynq-7000/13109/3 "2021-08-08T14:39:29Z")

</div>

Hello @htibosch

Now I got things working, actually, they were working before however I had some  
mistakes

1. I am using the Trenz TE0790 , and as you mentioned this board requires an FPGA  
mod, to link the PINS on the Second EMAC to the PHY, the PHY is on a TE0706  
adapter card.
2. MMU setup for the privileges and a basic stack size allocation issue where  
I was testing UDP with a 256 local buffer and the stack was just 144 bytes.

I think if I can get my boards FPGA modified to get the PHY link to the EMAC  
the second Ethernet port ETH1 should also be ok.

One thing I observed while testing for performance with the max bandwidth the Stack can take, or say a UDP message fired at the FreeRTOS stack at say from 1ms to 100ms.  
The Stack was ok till about 80ms, however less than that it struggled. 1ms may be too  
tight though.

Thanks again for being so proactive in helping the community  
Anand