# Latest **URL:** https://forums.freertos.org/latest.md [Latest](https://forums.freertos.org/latest.md) · [Categories](https://forums.freertos.org/categories.md) · [Tags](https://forums.freertos.org/tags.md) --- ## [About portSET\_INTERRUPT\_MASK\_FROM\_ISR()](https://forums.freertos.org/t/about-portset-interrupt-mask-from-isr/25192)
**Author:** [@suntianyun](https://forums.freertos.org/u/suntianyun)\ **Replies:** 1\ **Last updated:** [October 14, 2026, 1:31pm UTC](https://forums.freertos.org/t/about-portset-interrupt-mask-from-isr/25192 "2026-10-14T13:31:28Z")
Hello everyone, I’m currently learning FreeRTOS on ARM Cortex-M3 and came across the macro portSET\_INTERRUPT\_MASK\_FROM\_ISR(), which is the ISR version of the API for entering a critical section. The task-level critical-… --- ## [Emulating FreeRTOS on Android](https://forums.freertos.org/t/emulating-freertos-on-android/25190)
**Author:** [@byron.hawkins](https://forums.freertos.org/u/byron.hawkins)\ **Replies:** 3\ **Last updated:** [October 14, 2026, 12:18pm UTC](https://forums.freertos.org/t/emulating-freertos-on-android/25190 "2026-10-14T12:18:59Z")
It would be nice to test my FreeRTOS app on a device with an ARM processor, instead of emulating ARM on an Intel platform. For general command-line programs on ARM, emulation can easily be avoided by running them in Term… --- ## [Tips to Reduce processor load](https://forums.freertos.org/t/tips-to-reduce-processor-load/25104)
**Author:** [@vigneshv1](https://forums.freertos.org/u/vigneshv1)\ **Replies:** 20\ **Last updated:** [October 13, 2026, 5:36pm UTC](https://forums.freertos.org/t/tips-to-reduce-processor-load/25104 "2026-10-13T17:36:54Z")
Hello guys, I have to reduce the processor load, in a way like unwanted code should not run unnecessarily. So that I am making my system partially event based, and I am giving priority to each event so that every part … --- ## [Proposal: optional preemption-threshold scheduling](https://forums.freertos.org/t/proposal-optional-preemption-threshold-scheduling/25188)
**Author:** [@vansvan17](https://forums.freertos.org/u/vansvan17)\ **Replies:** 6\ **Last updated:** [October 13, 2026, 1:46pm UTC](https://forums.freertos.org/t/proposal-optional-preemption-threshold-scheduling/25188 "2026-10-13T13:46:11Z")
I would like feedback on adding optional preemption-threshold scheduling to the FreeRTOS kernel. Motivation FreeRTOS currently supports preemptive and cooperative scheduling. A preemption threshold provides an intermedi… --- ## [Reviewer routing for RISC-V timer-path PR #1482](https://forums.freertos.org/t/reviewer-routing-for-risc-v-timer-path-pr-1482/25182)
**Author:** [@zms](https://forums.freertos.org/u/zms)\ **Replies:** 1\ **Last updated:** [October 7, 2026, 2:52pm UTC](https://forums.freertos.org/t/reviewer-routing-for-risc-v-timer-path-pr-1482/25182 "2026-10-07T14:52:12Z")
Hi, I submitted a focused optimization for the generic GCC RISC-V machine-timer path: Issue: \[Feature Request\] Defer RISC-V callee-saved register handling on no-switch timer interrupts · Issue #1464 · FreeRTOS/FreeRTOS… --- ## [Data transfer time is toggling with same amount of data in atum3 with Nios-V Freertos](https://forums.freertos.org/t/data-transfer-time-is-toggling-with-same-amount-of-data-in-atum3-with-nios-v-freertos/25163)
**Author:** [@raguram](https://forums.freertos.org/u/raguram)\ **Replies:** 9\ **Last updated:** [October 4, 2026, 4:47pm UTC](https://forums.freertos.org/t/data-transfer-time-is-toggling-with-same-amount-of-data-in-atum3-with-nios-v-freertos/25163 "2026-10-04T16:47:36Z")
Hi i am working on the atum3 terasic board using NiosV with FreeRTOS , where i am implementing WebServer application, basically Http Server is running on the board and http client on the linux host which is connected to… --- ## [AArch64 single-core FreeRTOS mutex and ARM exclusive instructions](https://forums.freertos.org/t/aarch64-single-core-freertos-mutex-and-arm-exclusive-instructions/25172)
**Author:** [@H\_a\_r\_i\_n\_i](https://forums.freertos.org/u/H_a_r_i_n_i)\ **Replies:** 1\ **Last updated:** [October 4, 2026, 2:10pm UTC](https://forums.freertos.org/t/aarch64-single-core-freertos-mutex-and-arm-exclusive-instructions/25172 "2026-10-04T14:10:49Z")
Hi, I am working with a single-core FreeRTOS application on an ARM Cortex-A55 using AArch64. I traced xSemaphoreTake() → xQueueSemaphoreTake() and inspected the generated AArch64 assembly. The mutex acquisition is per… --- ## [FreeRTOS hangs - iMX8 CM7 RPMSG](https://forums.freertos.org/t/freertos-hangs-imx8-cm7-rpmsg/23801)
**Author:** [@jbaum](https://forums.freertos.org/u/jbaum)\ **Replies:** 129\ **Last updated:** [October 1, 2026, 1:27am UTC](https://forums.freertos.org/t/freertos-hangs-imx8-cm7-rpmsg/23801 "2026-10-01T01:27:58Z")
Hi! We have been troubleshooting a problem for weeks now and could use some clues how the behavior we are seeing could be happening. We suspect the issue comes from bad usage of FreeRTOS, not from an actual bug in Free… --- ## [Zynq-7000 FreeRTOS FPU context / IRQ handling with LWIP](https://forums.freertos.org/t/zynq-7000-freertos-fpu-context-irq-handling-with-lwip/25174)
**Author:** [@Sam1](https://forums.freertos.org/u/Sam1)\ **Replies:** 1\ **Last updated:** [September 30, 2026, 10:21am UTC](https://forums.freertos.org/t/zynq-7000-freertos-fpu-context-irq-handling-with-lwip/25174 "2026-09-30T10:21:22Z")
I observed sporadic TCP payload corruption on a Zynq-7000 XC7Z020 running FreeRTOS and lwIP 2.2.0 with a hard-float build. The application source buffer was always correct, but in reproduced failures the data was already… --- ## [portENTER\_CRITICAL() and portEXIT\_CRITICAL() implementation case](https://forums.freertos.org/t/portenter-critical-and-portexit-critical-implementation-case/25161)
**Author:** [@EugeneK](https://forums.freertos.org/u/EugeneK)\ **Replies:** 19\ **Last updated:** [September 30, 2026, 3:02am UTC](https://forums.freertos.org/t/portenter-critical-and-portexit-critical-implementation-case/25161 "2026-09-30T03:02:36Z")
Hello, I have a silicon vendor FreeRTOS port that does this #define portENTER\_CRITICAL() vTaskEnterCritical() #define portEXIT\_CRITICAL() vTaskExitCritical() which does not seem to be correct port implementation to m… --- ## [SMP: are two vTaskSuspendAll()/xTaskResumeAll() regions on different cores mutually exclusive?](https://forums.freertos.org/t/smp-are-two-vtasksuspendall-xtaskresumeall-regions-on-different-cores-mutually-exclusive/25162)
**Author:** [@parmi](https://forums.freertos.org/u/parmi)\ **Replies:** 1\ **Last updated:** [September 26, 2026, 5:06pm UTC](https://forums.freertos.org/t/smp-are-two-vtasksuspendall-xtaskresumeall-regions-on-different-cores-mutually-exclusive/25162 "2026-09-26T17:06:31Z")
Hi, On the SMP kernel, two regions bracketed by vTaskSuspendAll() / xTaskResumeAll() and running on different cores already exclude each other. In tasks.c (V11.1.0+) the configNUMBER\_OF\_CORES \> 1 branch of vTaskSuspendA… --- ## [Cortex-M MPU ports delay high priority ISRs](https://forums.freertos.org/t/cortex-m-mpu-ports-delay-high-priority-isrs/25115)
**Author:** [@dbrunner4](https://forums.freertos.org/u/dbrunner4)\ **Replies:** 3\ **Last updated:** [September 25, 2026, 8:21pm UTC](https://forums.freertos.org/t/cortex-m-mpu-ports-delay-high-priority-isrs/25115 "2026-09-25T20:21:16Z")
The documentation says that interrupts above configMAX\_SYSCALL\_INTERRUPT\_PRIORITY are not delayed by the kernel. (Among other places, in the FreeRTOS customization page’s configKERNEL\_INTERRUPT\_PRIORITY section: “Interru… --- ## [Why requiring to include FreeRTOS.h but not including it?](https://forums.freertos.org/t/why-requiring-to-include-freertos-h-but-not-including-it/25164)
**Author:** [@jona](https://forums.freertos.org/u/jona)\ **Replies:** 1\ **Last updated:** [September 25, 2026, 3:25pm UTC](https://forums.freertos.org/t/why-requiring-to-include-freertos-h-but-not-including-it/25164 "2026-09-25T15:25:25Z")
In task.h (L35), we can find: \`\`\`C #ifndef INC\_FREERTOS\_H #error “include FreeRTOS.h must appear in source files before include task.h” #endif \`\`\` Why not just including it ? Thank you, Jona --- ## [Semaphore may block](https://forums.freertos.org/t/semaphore-may-block/24773)
**Author:** [@svenb](https://forums.freertos.org/u/svenb)\ **Replies:** 29\ **Last updated:** [September 22, 2026, 3:09pm UTC](https://forums.freertos.org/t/semaphore-may-block/24773 "2026-09-22T15:09:47Z")
I’ve studied Your Semaphore in the documentation. You have implemented a counter to provide simultanous reads. Two reading threads may block a thread trying to write. To make it safe, You need to prevent reading as soon … --- ## [Documentation. Add FreeRTOS porting notes](https://forums.freertos.org/t/documentation-add-freertos-porting-notes/25140)
**Author:** [@Nikolay-Po](https://forums.freertos.org/u/Nikolay-Po)\ **Replies:** 5\ **Last updated:** [September 10, 2026, 7:43pm UTC](https://forums.freertos.org/t/documentation-add-freertos-porting-notes/25140 "2026-09-10T19:43:39Z")
@aggarg In a replay of Race in xTaskGenericNotifyWait() when cache enabled - #32 by aggarg Have tried to add a page here (not finished yet) add a page for porting notes. Take a look, please. When ready, I will submit … --- ## [Cortex-Rx MPU - Reprogramming Active MPU Region Potentially Creates Abort](https://forums.freertos.org/t/cortex-rx-mpu-reprogramming-active-mpu-region-potentially-creates-abort/25141)
**Author:** [@Brandon](https://forums.freertos.org/u/Brandon)\ **Replies:** 4\ **Last updated:** [September 6, 2026, 8:31am UTC](https://forums.freertos.org/t/cortex-rx-mpu-reprogramming-active-mpu-region-potentially-creates-abort/25141 "2026-09-06T08:31:36Z")
Hello, I’m looking at the “Cortex-Rx” MPU port (for a Cortex-R5F target), specifically where we program the MPU regions in portASM.S around portable/GCC/ARM\_CRx\_MPU/portASM.S#L118 MOV R5, #portFIRST\_CONFIGURABL… --- ## [ANyone thought of an EL2 layer of FreeRTOS for Zynq US+ as a static partitioner for EL1 FreeRTOS applications on A53s?](https://forums.freertos.org/t/anyone-thought-of-an-el2-layer-of-freertos-for-zynq-us-as-a-static-partitioner-for-el1-freertos-applications-on-a53s/25131)
**Author:** [@EM1SSNuke](https://forums.freertos.org/u/EM1SSNuke)\ **Replies:** 1\ **Last updated:** [September 2, 2026, 9:05pm UTC](https://forums.freertos.org/t/anyone-thought-of-an-el2-layer-of-freertos-for-zynq-us-as-a-static-partitioner-for-el1-freertos-applications-on-a53s/25131 "2026-09-02T21:05:13Z")
I’m interested in working on a FreeRTOS at EL2 for static partitioning for the 4 A53s, such that each A53 can run an AMP FreeRTOS setup at EL1. Initially hard coded, maybe, to support interrupts, peripherals and DMA fo… --- ## [Race in xTaskGenericNotifyWait() when cache enabled](https://forums.freertos.org/t/race-in-xtaskgenericnotifywait-when-cache-enabled/24983)
**Author:** [@posner](https://forums.freertos.org/u/posner)\ **Replies:** 31\ **Last updated:** [September 1, 2026, 11:36am UTC](https://forums.freertos.org/t/race-in-xtaskgenericnotifywait-when-cache-enabled/24983 "2026-09-01T11:36:28Z")
Hi everyone, I am debugging an issue on my costum Cortex-R5 FreeRTOS port. I’m currently using FreeRTOS Kernel V11.1.0. I traced my wait API call OS\_WaitForNotificationIndexed() down to xTaskNotifyWaitIndexed, which ma… --- ## [FreeRTOS MPU v10.3.1 with STM32H7 Core](https://forums.freertos.org/t/freertos-mpu-v10-3-1-with-stm32h7-core/25122)
**Author:** [@tanvi2931](https://forums.freertos.org/u/tanvi2931)\ **Replies:** 10\ **Last updated:** [September 1, 2026, 6:09am UTC](https://forums.freertos.org/t/freertos-mpu-v10-3-1-with-stm32h7-core/25122 "2026-09-01T06:09:06Z")
Has anyone ported the FreeRTOS v10.3.1 with MPU Support with M7? I am facing multiple problems in doing so eg. LDREX instruction throwing a HardFault, Cache issues in context switching (task heap corruption), 16 MPU port… --- ## [Zynq UltraScale+ FreeRTOS: XDpPsu interrupts work, but XDpDma interrupts never reach the driver handler](https://forums.freertos.org/t/zynq-ultrascale-freertos-xdppsu-interrupts-work-but-xdpdma-interrupts-never-reach-the-driver-handler/25136)
**Author:** [@SaraCliff](https://forums.freertos.org/u/SaraCliff)\ **Replies:** 5\ **Last updated:** [August 31, 2026, 7:00am UTC](https://forums.freertos.org/t/zynq-ultrascale-freertos-xdppsu-interrupts-work-but-xdpdma-interrupts-never-reach-the-driver-handler/25136 "2026-08-31T07:00:23Z")
Hi everyone, I am having an issue running the AMD/Xilinx xdpdma\_video\_example.c with FreeRTOS on a Zynq UltraScale+ MPSoC. Setup: AUP-ZU3 / XCZU3EG Vitis Unified 2025.2 FreeRTOS PS DisplayPort + DPDMA SDT flow The o… --- ## [What is best approach to delete static task safely?](https://forums.freertos.org/t/what-is-best-approach-to-delete-static-task-safely/25138)
**Author:** [@Nikolay-Po](https://forums.freertos.org/u/Nikolay-Po)\ **Replies:** 2\ **Last updated:** [August 30, 2026, 3:06pm UTC](https://forums.freertos.org/t/what-is-best-approach-to-delete-static-task-safely/25138 "2026-08-30T15:06:16Z")
I’m developing FLASH memory driver under current LTS FreeRTOS version. For some types of hardware failures I’d prefer to re-initialise the whole driver including the task deletion. As far as I know from FreeRTOS documen… --- ## [FreeRTOS C++ integration](https://forums.freertos.org/t/freertos-c-integration/15813)
**Author:** [@richardjnb](https://forums.freertos.org/u/richardjnb)\ **Replies:** 13\ **Last updated:** [August 27, 2026, 12:36am UTC](https://forums.freertos.org/t/freertos-c-integration/15813 "2026-08-27T00:36:12Z")
Hello I’ve done a spot of internet searching, and I’m working on a project that I’m trying to do with the future in mind, in that I am utilising C++ classes to define my architecture – I am working with FreeRTOS 10 as t… --- ## [User-defined misaligned MPU regions can override kernel-defined regions on ARM\_CM3\_MPU](https://forums.freertos.org/t/user-defined-misaligned-mpu-regions-can-override-kernel-defined-regions-on-arm-cm3-mpu/25130)
**Author:** [@CocoDico78](https://forums.freertos.org/u/CocoDico78)\ **Replies:** 3\ **Last updated:** [August 24, 2026, 10:44am UTC](https://forums.freertos.org/t/user-defined-misaligned-mpu-regions-can-override-kernel-defined-regions-on-arm-cm3-mpu/25130 "2026-08-24T10:44:57Z")
While the docs are extensively mentioning that all regions should be aligned to power of two for correct MPU configuration, it is not explicit enough that not aligning (or not sanitizing) a user-defined region or a stack… --- ## [Interrupts not working when booting FreeRTOS with barebox on Zynq Ultrascale+ on A53 on EL1\_NONSECURE Mode](https://forums.freertos.org/t/interrupts-not-working-when-booting-freertos-with-barebox-on-zynq-ultrascale-on-a53-on-el1-nonsecure-mode/18587)
**Author:** [@Borli](https://forums.freertos.org/u/Borli)\ **Replies:** 10\ **Last updated:** [August 17, 2026, 5:56am UTC](https://forums.freertos.org/t/interrupts-not-working-when-booting-freertos-with-barebox-on-zynq-ultrascale-on-a53-on-el1-nonsecure-mode/18587 "2026-08-17T05:56:36Z")
Hello everyone, I am currently trying to get Interrupts working on the freeRtos A53 Xilinx Port when booting in EL1\_NONSECURE Mode from barebox. This is the freeRtos implementation from Xilinx we are using: https://gith… --- ## [ZYNQ7000 XPAR\_XILTIMER\_ENABLED Macro definition prevents initialization of interrupt controller](https://forums.freertos.org/t/zynq7000-xpar-xiltimer-enabled-macro-definition-prevents-initialization-of-interrupt-controller/17356)
**Author:** [@xiuyangzhang](https://forums.freertos.org/u/xiuyangzhang)\ **Replies:** 5\ **Last updated:** [August 14, 2026, 6:50am UTC](https://forums.freertos.org/t/zynq7000-xpar-xiltimer-enabled-macro-definition-prevents-initialization-of-interrupt-controller/17356 "2026-08-14T06:50:27Z")
In zynq7000, the interrupt controller scugic is defined by freertos as a global variable xInterruptController. And in the task scheduling start function, FreeRTOS\_ The SetupTickInterrupt function is initialized. Since mo… --- ## [Version of STM32 HAL utilized?](https://forums.freertos.org/t/version-of-stm32-hal-utilized/25119)
**Author:** [@rhaber80](https://forums.freertos.org/u/rhaber80)\ **Replies:** 1\ **Last updated:** [August 13, 2026, 6:21am UTC](https://forums.freertos.org/t/version-of-stm32-hal-utilized/25119 "2026-08-13T06:21:19Z")
Which STM32CubeH7 version was used to validate the current STM32Hxx NetworkInterface.c in FreeRTOS-Plus-TCP V4.4.1 / 202604.00-LTS? --- ## [Can the \`configUSE\_NEWLIB\_REENTRANT\` be applicable to FreeRTOS?](https://forums.freertos.org/t/can-the-configuse-newlib-reentrant-be-applicable-to-freertos/24777)
**Author:** [@Saiiijchan](https://forums.freertos.org/u/Saiiijchan)\ **Replies:** 17\ **Last updated:** [August 13, 2026, 6:17am UTC](https://forums.freertos.org/t/can-the-configuse-newlib-reentrant-be-applicable-to-freertos/24777 "2026-08-13T06:17:45Z")
Not very familiar with the newlib reentrant feature, I’d like to ask whether it can be used on an SMP system. Thanks --- ## [ML-KEM implementation with bounded memory use and a FreeRTOS port](https://forums.freertos.org/t/ml-kem-implementation-with-bounded-memory-use-and-a-freertos-port/25112)
**Author:** [@kstzv](https://forums.freertos.org/u/kstzv)\ **Replies:** 4\ **Last updated:** [August 12, 2026, 8:23am UTC](https://forums.freertos.org/t/ml-kem-implementation-with-bounded-memory-use-and-a-freertos-port/25112 "2026-08-12T08:23:31Z")
Hello, I have developed an implementation of ML-KEM, the standardized post-quantum key-encapsulation mechanism defined in FIPS 203. It uses an architecture intended to make the algorithm practical in constrained systems… --- ## [FreeRTOS Plus TCP wrong frame size with BufferAllocation\_1.c](https://forums.freertos.org/t/freertos-plus-tcp-wrong-frame-size-with-bufferallocation-1-c/24833)
**Author:** [@posner](https://forums.freertos.org/u/posner)\ **Replies:** 8\ **Last updated:** [August 10, 2026, 4:17pm UTC](https://forums.freertos.org/t/freertos-plus-tcp-wrong-frame-size-with-bufferallocation-1-c/24833 "2026-08-10T16:17:16Z")
Hello there, I’ve spent some time debugging my TCP implementation. I’m using TMS570LC435 copy Ethernet driver for FreeRTOS\*\*+\*\*TCP V4.3.2 and static buffer allocation (BufferAllocation\_1.c). To test the integration. I… --- ## [SMP support for MPC5775B](https://forums.freertos.org/t/smp-support-for-mpc5775b/25108)
**Author:** [@lala1](https://forums.freertos.org/u/lala1)\ **Replies:** 1\ **Last updated:** [August 10, 2026, 3:56pm UTC](https://forums.freertos.org/t/smp-support-for-mpc5775b/25108 "2026-08-10T15:56:35Z")
Does the kernel provide SMP support for the MPC5775B ? [Next page](https://forums.freertos.org/latest.md?page=1)